[U-Boot] Pull request: u-boot-riscv/master

[Tom Rini]

On Fri, Aug 16, 2019 at 01:19:59PM +0800, uboot at andestech.com wrote:

> Hi Tom,
> 
> Please pull some riscv updates:
> 
> - Fix sifive serial y-modem transfer.
> - Access CSRs using CSR numbers.
> - Update doc sifive-fu540
> - Support big endian hosts and target.
> 
> https://travis-ci.org/rickchen36/u-boot-riscv/builds/572159567
> 
> Thanks
> Rick
> 
> 
> The following changes since commit df33f8646855e65b8e7232c7fd5739e1ae1eb58b:
> 
>   configs: Resync with savedefconfig (2019-08-14 08:11:27 -0400)
> 
> are available in the Git repository at:
> 
>   git at gitlab.denx.de:u-boot/custodians/u-boot-riscv.git
> 
> for you to fetch changes up to 4539926a9c47638951f29f550f3a640e4c223032:
> 
>   riscv: tools: Add big endian target support to prelink-riscv (2019-08-15 13:42:28 +0800)
> 

Applied to u-boot/master, thanks!


-- 
Tom
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