[U-Boot] [PATCH 1/1] serial: ns16550: Read reg-io-type from device tree

[Park, Aiden]

ns16550 can select register access type from device tree.
This also allows an inherited serial driver of ns16550 to configure
register access type at run-time by overriding ofdata_to_platdata.

Signed-off-by: Aiden Park <aiden.park at intel.com>
---
 drivers/serial/ns16550.c | 63 +++++++++++++++++++++++++++++++---------
 include/ns16550.h        | 11 +++++++
 2 files changed, 60 insertions(+), 14 deletions(-)

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 6cf2be8f2b..91c810a5cc 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -99,12 +99,21 @@ static void ns16550_writeb(NS16550_t port, int offset, int value)
 
 	offset *= 1 << plat->reg_shift;
 	addr = (unsigned char *)plat->base + offset;
+	addr += plat->reg_offset;
 
-	/*
-	 * As far as we know it doesn't make sense to support selection of
-	 * these options at run-time, so use the existing CONFIG options.
-	 */
-	serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value);
+	if (plat->reg_io_type == REG_IO_TYPE_PORT) {
+		outb(value, (ulong)addr);
+	} else if (plat->reg_io_type == REG_IO_TYPE_MEM) {
+#if defined(CONFIG_SYS_LITTLE_ENDIAN)
+		out_le32(addr, value);
+#elif defined(CONFIG_SYS_BIG_ENDIAN)
+		out_be32(addr, value);
+#else
+		writel(value, addr);
+#endif
+	} else {
+		serial_out_shift(addr, plat->reg_shift, value);
+	}
 }
 
 static int ns16550_readb(NS16550_t port, int offset)
@@ -114,8 +123,21 @@ static int ns16550_readb(NS16550_t port, int offset)
 
 	offset *= 1 << plat->reg_shift;
 	addr = (unsigned char *)plat->base + offset;
+	addr += plat->reg_offset;
 
-	return serial_in_shift(addr + plat->reg_offset, plat->reg_shift);
+	if (plat->reg_io_type == REG_IO_TYPE_PORT) {
+		return inb((ulong)addr);
+	} else if (plat->reg_io_type == REG_IO_TYPE_MEM) {
+#if defined(CONFIG_SYS_LITTLE_ENDIAN)
+		return in_le32(addr);
+#elif defined(CONFIG_SYS_BIG_ENDIAN)
+		return in_be32(addr);
+#else
+		return readl(addr);
+#endif
+	} else {
+		return serial_in_shift(addr, plat->reg_shift);
+	}
 }
 
 static u32 ns16550_getfcr(NS16550_t port)
@@ -395,11 +417,18 @@ static int ns16550_serial_getinfo(struct udevice *dev,
 	struct ns16550_platdata *plat = com_port->plat;
 
 	info->type = SERIAL_CHIP_16550_COMPATIBLE;
+	if (plat->reg_io_type == REG_IO_TYPE_PORT) {
+		info->addr_space = SERIAL_ADDRESS_SPACE_IO;
+	} else if (plat->reg_io_type == REG_IO_TYPE_MEM) {
+		info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY;
+	} else {
 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
-	info->addr_space = SERIAL_ADDRESS_SPACE_IO;
+		info->addr_space = SERIAL_ADDRESS_SPACE_IO;
 #else
-	info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY;
+		info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY;
 #endif
+	}
+
 	info->addr = plat->base;
 	info->reg_width = plat->reg_width;
 	info->reg_shift = plat->reg_shift;
@@ -473,15 +502,21 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
 	if (addr == FDT_ADDR_T_NONE)
 		return -EINVAL;
 
-#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
-	plat->base = addr;
-#else
-	plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
-#endif
-
 	plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
 	plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
 	plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1);
+	plat->reg_io_type = dev_read_u32_default(dev, "reg-io-type", 0);
+	if (plat->reg_io_type == REG_IO_TYPE_PORT) {
+		plat->base = addr;
+	} else if (plat->reg_io_type == REG_IO_TYPE_MEM) {
+		plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
+	} else {
+#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
+		plat->base = addr;
+#else
+		plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
+#endif
+	}
 
 	err = clk_get_by_index(dev, 0, &clk);
 	if (!err) {
diff --git a/include/ns16550.h b/include/ns16550.h
index 22b89e4d6d..821a946e42 100644
--- a/include/ns16550.h
+++ b/include/ns16550.h
@@ -45,16 +45,27 @@
 	unsigned char postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE - 1];
 #endif
 
+/**
+ * reg_io_type in ns16550_platdata
+ */
+enum {
+	REG_IO_TYPE_NOT_SPECIFIED = 0,
+	REG_IO_TYPE_PORT,
+	REG_IO_TYPE_MEM,
+};
+
 /**
  * struct ns16550_platdata - information about a NS16550 port
  *
  * @base:		Base register address
+ * @reg_io_type:	IO access type (0=not specified, 1=port io, 2=mmio)
  * @reg_width:		IO accesses size of registers (in bytes)
  * @reg_shift:		Shift size of registers (0=byte, 1=16bit, 2=32bit...)
  * @clock:		UART base clock speed in Hz
  */
 struct ns16550_platdata {
 	unsigned long base;
+	int reg_io_type;
 	int reg_width;
 	int reg_shift;
 	int reg_offset;
-- 
2.20.1