[U-Boot] [PATCH] net: macb: Fix rx buffer cache handling
Stefan Roese
sr at denx.de
Fri Aug 23 10:36:56 UTC 2019
Hi Bin,
On 23.08.19 11:22, Bin Meng wrote:
> On Fri, Aug 23, 2019 at 5:17 PM Bin Meng <bmeng.cn at gmail.com> wrote:
>>
>> Hi Stefan,
>>
>> On Fri, Aug 23, 2019 at 5:02 PM Stefan Roese <sr at denx.de> wrote:
>>>
>>> With commit c6d07bf440bc ("net/macb: increase RX buffer size for GEM")
>>> ethernet support does not work any more with d-cache enabled on the
>>> AT91SAM. The reason is, that MACB_RX_BUFFER_SIZE was changed from 4096
>>> to 128 but this change was not refected in the rx_buffer flush and
>>> invalidate functions, as these also use this macro.
>>>
>>> This patch now fixes this by calculating the rx buffer size correctly
>>> again in those functions. With this change, ethernet works again
>>> reliably on my AT91SAM board.
>>>
>>> Signed-off-by: Stefan Roese <sr at denx.de>
>>> Cc: Ramon Fried <rfried.dev at gmail.com>
>>> Cc: Eugen Hristev <eugen.hristev at microchip.com>
>>> Cc: Anup Patel <anup.patel at wdc.com>
>>> Cc: Bin Meng <bmeng.cn at gmail.com>
>>> Cc: Joe Hershberger <joe.hershberger at ni.com>
>>> ---
>>> drivers/net/macb.c | 6 ++++--
>>> 1 file changed, 4 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/net/macb.c b/drivers/net/macb.c
>>> index c99cf663a4..fca380d012 100644
>>> --- a/drivers/net/macb.c
>>> +++ b/drivers/net/macb.c
>>> @@ -296,13 +296,15 @@ static inline void macb_flush_ring_desc(struct macb_device *macb, bool rx)
>>> static inline void macb_flush_rx_buffer(struct macb_device *macb)
>>> {
>>> flush_dcache_range(macb->rx_buffer_dma, macb->rx_buffer_dma +
>>> - ALIGN(MACB_RX_BUFFER_SIZE, PKTALIGN));
>>> + ALIGN(MACB_RX_BUFFER_SIZE * MACB_RX_RING_SIZE,
>>> + PKTALIGN));
>>
>> This looks wrong to me.
>>
>> Shouldn't it be:
>>
>> flush_dcache_range(macb->rx_buffer_dma, macb->rx_buffer_dma +
>> ALIGN(macb->rx_buffer_size, PKTALIGN));
>
> Ah, for MACB, looks it should be "MACB_RX_BUFFER_SIZE *
> MACB_RX_RING_SIZE", but for GEM, I am not sure.
>
> Should it be:
>
> flush_dcache_range(macb->rx_buffer_dma, macb->rx_buffer_dma +
> ALIGN(macb->rx_buffer_size *
> MACB_RX_RING_SIZE, PKTALIGN));
Yes, this looks correct. v2 will follow soon.
Thanks,
Stefan
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