[U-Boot] [PATCHv2 1/3] dm: pcie_fsl: Fix workaround of P4080 erratum A003

[Z.q. Hou]

From: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>

In the workaround of P4080 erratum A003, it uses the macro
CONFIG_SYS_FSL_CORENET_SERDES_ADDR to get the SerDes block
register address, the CONFIG_SYS_FSL_CORENET_SERDES_ADDR is
defined as following:

	(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES_OFFSET)

The problem is the macro CONFIG_SYS_FSL_CORENET_SERDES_ADDR is
defined on both corenet and non-corenet platforms (though it
should be defined only on corenet platforms), but the macro
CONFIG_SYS_FSL_CORENET_SERDES_OFFSET is only defined on corenet
platforms, so when enabled this driver on non-corenet platforms,
the following build error will come up:

drivers/pci/pcie_fsl.c: In function 'fsl_pcie_init_port':
./arch/powerpc/include/asm/immap_85xx.h:3000:21: error:
'CONFIG_SYS_FSL_CORENET_SERDES_OFFSET' undeclared (first use
in this function); did you mean 'CONFIG_SYS_FSL_CORENET_SERDES_ADDR'?
  (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES_OFFSET)
	                     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Fix this build error by replacing it with a new added macro for
SerDes address of P4080.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
---
V2:
 - Replaced CONFIG_SYS_FSL_CORENET_SERDES_ADDR with the CCSR base + 
   P4080 SerDes offset.
 - Reworded the change log slightly.

 drivers/pci/pcie_fsl.c | 2 +-
 drivers/pci/pcie_fsl.h | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c
index 4d61a46cef..29b50f2376 100644
--- a/drivers/pci/pcie_fsl.c
+++ b/drivers/pci/pcie_fsl.c
@@ -444,7 +444,7 @@ static int fsl_pcie_init_port(struct fsl_pcie *pcie)
 	    !fsl_pcie_link_up(pcie)) {
 		serdes_corenet_t *srds_regs;
 
-		srds_regs = (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
+		srds_regs = (void *)P4080_SERDES_ADDR;
 		val_32 = in_be32(&srds_regs->srdspccr0);
 
 		if ((val_32 >> 28) == 3) {
diff --git a/drivers/pci/pcie_fsl.h b/drivers/pci/pcie_fsl.h
index 5eefc31fa9..35a740241e 100644
--- a/drivers/pci/pcie_fsl.h
+++ b/drivers/pci/pcie_fsl.h
@@ -40,6 +40,8 @@
 #define LTSSM_L0_REV3			0x11
 #define LTSSM_L0			0x16
 
+#define P4080_SERDES_ADDR		(CONFIG_SYS_IMMR + 0xEA000)
+
 struct fsl_pcie {
 	int idx;
 	struct udevice *bus;
-- 
2.17.1