[U-Boot] [PATCH 2/2] drivers: pci: add API to issue FLR on a PCI function, if supported

[Bin Meng]

+Simon

Hi Alex,

On Sat, Jun 1, 2019 at 12:27 AM Alex Marginean <alexm.osslist at gmail.com> wrote:
>

Please add a commit message to explain the changes.

Also a nits in the commit tile: please remove the ,

> Signed-off-by: Alex Marginean <alexm.osslist at gmail.com>
> ---
>  drivers/pci/pci-uclass.c | 25 +++++++++++++++++++++++++
>  include/pci.h            | 11 +++++++++++
>  2 files changed, 36 insertions(+)
>
> diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
> index 3204f156c3..12b171f9f2 100644
> --- a/drivers/pci/pci-uclass.c
> +++ b/drivers/pci/pci-uclass.c
> @@ -1495,6 +1495,31 @@ int dm_pci_find_ext_capability(struct udevice *dev, int cap)
>         return dm_pci_find_next_ext_capability(dev, 0, cap);
>  }
>
> +int dm_pci_flr(struct udevice *dev)
> +{
> +       int pcie_off;
> +       u32 cap;
> +       u16 cmd;
> +
> +       /* look for PCI Express Capability */
> +       pcie_off = dm_pci_find_capability(dev, PCI_CAP_ID_EXP);
> +       if (!pcie_off)
> +               return -ENOENT;
> +
> +       /* check FLR capability */
> +       dm_pci_read_config32(dev, pcie_off + 4, &cap);

Please use macros for offset 4

> +       if (!(cap & PCI_X_CAP_FLR))
> +               return -ENOENT;
> +
> +       dm_pci_read_config16(dev, pcie_off + 8, &cmd);

ditto

> +       dm_pci_write_config16(dev, pcie_off + 8, cmd | PCI_X_CMD_FLR);
> +
> +       /* wait 100ms, per PCI spec */
> +       mdelay(100);
> +
> +       return 0;
> +}
> +
>  UCLASS_DRIVER(pci) = {
>         .id             = UCLASS_PCI,
>         .name           = "pci",
> diff --git a/include/pci.h b/include/pci.h
> index e1528bb257..c93e06dfb1 100644
> --- a/include/pci.h
> +++ b/include/pci.h
> @@ -384,11 +384,14 @@
>
>  /* PCI-X registers */
>
> +#define  PCI_X_CAP_FLR         0x10000000 /* Function Level Reset capability */

This is not PCI_X, but PCI express.

> +
>  #define  PCI_X_CMD_DPERR_E      0x0001  /* Data Parity Error Recovery Enable */
>  #define  PCI_X_CMD_ERO          0x0002  /* Enable Relaxed Ordering */
>  #define  PCI_X_CMD_MAX_READ     0x0000  /* Max Memory Read Byte Count */
>  #define  PCI_X_CMD_MAX_SPLIT    0x0030  /* Max Outstanding Split Transactions */
>  #define  PCI_X_CMD_VERSION(x)   (((x) >> 12) & 3) /* Version */
> +#define  PCI_X_CMD_FLR          0x8000  /* EP Function Level Reset */

Ditto. Please import appropriate macros from Linux for above magic numbers too.

>
>
>  /* Slot Identification */
> @@ -1411,6 +1414,14 @@ int dm_pci_find_next_ext_capability(struct udevice *dev, int start, int cap);
>   */
>  int dm_pci_find_ext_capability(struct udevice *dev, int cap);
>
> +/**
> + * dm_pci_flr() - Perform FLR if the device suppoorts it
> + *
> + * @dev:       PCI device to reset
> + * @return:    0 if OK, -ENOENT if FLR is not supported by dev
> + */
> +int dm_pci_flr(struct udevice *dev);
> +
>  #define dm_pci_virt_to_bus(dev, addr, flags) \
>         dm_pci_phys_to_bus(dev, (virt_to_phys(addr)), (flags))
>  #define dm_pci_bus_to_virt(dev, addr, flags, len, map_flags) \
> --

Regards,
Bin