[U-Boot] Question about cfi flash driver can not work well in cacheable region !

[Rick Chen]

Hi Stefan

Stefan Roese <sr at denx.de> 於 2019年6月3日 週一 下午9:05寫道：
>
> Hi Rick,
>
> On 03.06.19 11:27, Rick Chen wrote:
> > Hi Stefan and other seniors
> >
> > I encounter some problems about cfi flash driver.
> > And hope you can give some comments to resolve it.
> > Followings are the flash verification status and descriptions :
> >
> > When I verify cfi flash which it's address base is in cacheable region
> > (0x88000000) and cache is enabled in system.
> > The flash detection, write and erase action will be failure somehow.
> > The failure messages will be as below:
> >
> > #################
> > # Detection failure #
> > #################
> > Flash: ## Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
> > 0 Bytes
> >
> > ###########
> > # Erase fail #
> > ###########
> > protect off all; erase 0x88000000 0x8bffffff;
> > Error: start and/or end address not on sector boundary
> > RISC-V #
> >
> > ###########
> > # Write fail #
> > ###########
> > RISC-V # cp.b 0x20000000 0x8bf00000 0x1444
> > RISC-V #
> >
> > But when I disable cache in system, they will all pass the verification.
> >
> > ################
> > # Detection pass #
> > ################
> > Flash: 64 MiB
> >
> > #############
> > # erase pass #
> > #############
> > protect off all; erase 0x88000000 0x8bffffff;
> > Un-Protect Flash Bank # 1
> >
> > ................................................
> > ................................................
> > ................................................
> > ................................................
> > ................................................
> > ................................................
> > ................................................
> > ................................................
> > ................................................
> > ................................................
> > ................................ done
> > Erased 512 sectors
> > RISC-V #
> >
> > ##############
> > # write pass #
> > ##############
> > RISC-V # cp.b 0x20000000 0x8bf00000 0x1444
> > Copy to Flash... done
> > RISC-V #
> >
> > How can I enable cache and let cfi flash can work fine to get better
> > performance ?
>
> The CFI driver expects the flash to be located on a uncached area.
> Is it possible on your architecture to map some areas uncached

Yes.
We have configuresd the flash address base in the uncached area in
another platform before.
And it would not be affected by enabling cache.

> and others cached? That's how it was done in the old PowerPC days,
> when parallel flash (via CFI) was still used much more frequently.
>

Now I know it much more.
Thanks for sharing the useful advice.

B.R
Rick

> Thanks,
> Stefan