[U-Boot] [PATCH 4/6] riscv: cache: Flush L2 cache before jump to linux

[Bin Meng]

Hi Rick,

On Tue, May 28, 2019 at 5:44 PM Andes <uboot at andestech.com> wrote:
>
> From: Rick Chen <rick at andestech.com>
>
> Flush and disable cache in cleanup_before_linux()
> which will be called before jump to linux.
>
> The sequence will be preferred as below:
> L1 flush -> L1 disable -> L2 flush -> L2 disable
>
> Signed-off-by: Rick Chen <rick at andestech.com>
> Cc: Greentime Hu <greentime at andestech.com>
> ---
>  arch/riscv/cpu/ax25/cpu.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/arch/riscv/cpu/ax25/cpu.c b/arch/riscv/cpu/ax25/cpu.c
> index 76689b2..9e7579a 100644
> --- a/arch/riscv/cpu/ax25/cpu.c
> +++ b/arch/riscv/cpu/ax25/cpu.c
> @@ -7,6 +7,7 @@
>  /* CPU specific code */
>  #include <common.h>
>  #include <asm/cache.h>
> +#include <asm/v5l2cache.h>
>
>  /*
>   * cleanup_before_linux() is called just before we call linux
> @@ -22,6 +23,9 @@ int cleanup_before_linux(void)
>         cache_flush();
>         icache_disable();
>         dcache_disable();
> +#ifdef CONFIG_RISCV_NDS_CACHE
> +       v5l2_disable();
> +#endif

The direct call into a driver should be avoided. Instead, use a proper
DM cache uclass driver API (see my review comments in patch [1/6])

Regards,
Bin