[U-Boot] [PATCH v2] riscv: add Kconfig entries for the F and D ISA extensions support

Bin Meng bmeng.cn at gmail.com
Tue Jun 4 06:44:37 UTC 2019


Hi Eric,

On Tue, Jun 4, 2019 at 1:51 PM Eric Lin <tesheng at andestech.com> wrote:
>
> This patch adds Kconfig entries for the F (Single-Precision)
> and D (Double-Precision) floating point instruction-set extensions.
>
> Signed-off-by: Eric Lin <tesheng at andestech.com>
> ---
> Changes for v2:
>         - Grammatical correction in commit message "adds"
>         - Fixed the config name to indicate both F and D
>
>  arch/riscv/Kconfig  |  7 +++++++
>  arch/riscv/Makefile | 12 ++++++++----
>  2 files changed, 15 insertions(+), 4 deletions(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 362f3cdc65..e7a76c67cc 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -91,6 +91,13 @@ config RISCV_ISA_C
>           when building U-Boot, which results in compressed instructions in the
>           U-Boot binary.
>
> +config RISCV_ISA_FD

Again like I said in the v1 patch, I am not in favor of adding such to
U-Boot, but if we have to add such, I think we need add finer control
of single-precision and double-precision via 2 options, one for ISA_F
and one for ISA_D. It's possible that toolchain only supports ISA_F,
although I should say that's a bit weird.

> +       bool "Emit Floating-point instructions"
> +       help
> +         Adds "F" and "D" to the ISA subsets that the toolchain is allowed to emit
> +         when building U-Boot, which results in Single and Double-precision instructions
> +         in the U-Boot binary.
> +
>  config RISCV_ISA_A
>         def_bool y
>
> diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
> index 0b80eb8d86..5a5c8e75f0 100644
> --- a/arch/riscv/Makefile
> +++ b/arch/riscv/Makefile
> @@ -5,15 +5,19 @@
>
>  ifeq ($(CONFIG_ARCH_RV64I),y)
>         ARCH_BASE = rv64im
> -       ABI = lp64
> +       ABI := lp64
>  endif
>  ifeq ($(CONFIG_ARCH_RV32I),y)
>         ARCH_BASE = rv32im
> -       ABI = ilp32
> +       ABI := ilp32
>  endif
>  ifeq ($(CONFIG_RISCV_ISA_A),y)
>         ARCH_A = a
>  endif
> +ifeq ($(CONFIG_RISCV_ISA_FD),y)
> +       ARCH_FD = fd
> +       ABI := $(ABI)d
> +endif
>  ifeq ($(CONFIG_RISCV_ISA_C),y)
>         ARCH_C = c
>  endif
> @@ -24,8 +28,8 @@ ifeq ($(CONFIG_CMODEL_MEDANY),y)
>         CMODEL = medany
>  endif
>
> -ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_C) -mabi=$(ABI) \
> -            -mcmodel=$(CMODEL)
> +ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_FD)$(ARCH_C) -mabi=$(ABI) \
> +                                -mcmodel=$(CMODEL)
>
>  PLATFORM_CPPFLAGS      += $(ARCH_FLAGS)
>  CFLAGS_EFI             += $(ARCH_FLAGS)
> --

Regards,
Bin


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