[U-Boot] [PATCH v1 11/11] ARM: display5: Remove common.c file (after DM/DTS U-Boot proper conversion)

[Peng Fan]

> Subject: [PATCH v1 11/11] ARM: display5: Remove common.c file (after
> DM/DTS U-Boot proper conversion)
> 
> The common.c file content can be safely moved to spl.c file after performing
> the DM/DTS conversion for the U-Boot proper.
> 
> It contains the non DM/DTS setup code, which now is only used by SPL.
> 
> Signed-off-by: Lukasz Majewski <lukma at denx.de>
> ---
> 
>  board/liebherr/display5/Makefile |  4 +-
> board/liebherr/display5/common.c | 83 ----------------------------------------
>  board/liebherr/display5/common.h |  5 ---
>  board/liebherr/display5/spl.c    | 74
> +++++++++++++++++++++++++++++++++++
>  4 files changed, 76 insertions(+), 90 deletions(-)  delete mode 100644
> board/liebherr/display5/common.c
> 
> diff --git a/board/liebherr/display5/Makefile
> b/board/liebherr/display5/Makefile
> index f934672428..ee503add75 100644
> --- a/board/liebherr/display5/Makefile
> +++ b/board/liebherr/display5/Makefile
> @@ -5,7 +5,7 @@
>  # SPDX-License-Identifier:    GPL-2.0+
>  #
>  ifdef CONFIG_SPL_BUILD
> -obj-y = common.o spl.o
> +obj-y = spl.o
>  else
> -obj-y := common.o display5.o
> +obj-y := display5.o
>  endif
> diff --git a/board/liebherr/display5/common.c
> b/board/liebherr/display5/common.c
> deleted file mode 100644
> index 71d79f85ab..0000000000
> --- a/board/liebherr/display5/common.c
> +++ /dev/null
> @@ -1,83 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0+
> -/*
> - * Copyright (C) 2017 DENX Software Engineering
> - * Lukasz Majewski, DENX Software Engineering, lukma at denx.de
> - */
> -
> -#include <asm/mach-imx/iomux-v3.h>
> -#include <asm/arch/mx6-pins.h>
> -#include "common.h"
> -
> -iomux_v3_cfg_t const uart_console_pads[] = {
> -	/* UART5 */
> -	MX6_PAD_CSI0_DAT14__UART5_TX_DATA |
> MUX_PAD_CTRL(UART_PAD_CTRL),
> -	MX6_PAD_CSI0_DAT15__UART5_RX_DATA |
> MUX_PAD_CTRL(UART_PAD_CTRL),
> -	MX6_PAD_CSI0_DAT18__UART5_RTS_B |
> MUX_PAD_CTRL(UART_PAD_CTRL),
> -	MX6_PAD_CSI0_DAT19__UART5_CTS_B |
> MUX_PAD_CTRL(UART_PAD_CTRL),
> -};
> -
> -void displ5_set_iomux_uart_spl(void)
> -{
> -	SETUP_IOMUX_PADS(uart_console_pads);
> -}
> -
> -iomux_v3_cfg_t const misc_pads_spl[] = {
> -	/* Emergency recovery pin */
> -	MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
> -};
> -
> -void displ5_set_iomux_misc_spl(void)
> -{
> -	SETUP_IOMUX_PADS(misc_pads_spl);
> -}
> -
> -#ifdef CONFIG_MXC_SPI
> -iomux_v3_cfg_t const ecspi2_pads[] = {
> -	/* SPI2, NOR Flash nWP, CS0 */
> -	MX6_PAD_CSI0_DAT10__ECSPI2_MISO	|
> MUX_PAD_CTRL(SPI_PAD_CTRL),
> -	MX6_PAD_CSI0_DAT9__ECSPI2_MOSI	|
> MUX_PAD_CTRL(SPI_PAD_CTRL),
> -	MX6_PAD_CSI0_DAT8__ECSPI2_SCLK	|
> MUX_PAD_CTRL(SPI_PAD_CTRL),
> -	MX6_PAD_CSI0_DAT11__GPIO5_IO29	|
> MUX_PAD_CTRL(NO_PAD_CTRL),
> -	MX6_PAD_SD3_DAT5__GPIO7_IO00	|
> MUX_PAD_CTRL(NO_PAD_CTRL),
> -};
> -
> -int board_spi_cs_gpio(unsigned int bus, unsigned int cs) -{
> -	if (bus != 1 || cs != 0)
> -		return -EINVAL;
> -
> -	return IMX_GPIO_NR(5, 29);
> -}
> -
> -void displ5_set_iomux_ecspi_spl(void)
> -{
> -	SETUP_IOMUX_PADS(ecspi2_pads);
> -}
> -
> -#else
> -void displ5_set_iomux_ecspi_spl(void) {} -#endif
> -
> -#ifdef CONFIG_FSL_ESDHC
> -iomux_v3_cfg_t const usdhc4_pads[] = {
> -	MX6_PAD_SD4_CLK__SD4_CLK	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> -	MX6_PAD_SD4_CMD__SD4_CMD	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> -	MX6_PAD_SD4_DAT0__SD4_DATA0	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> -	MX6_PAD_SD4_DAT1__SD4_DATA1	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> -	MX6_PAD_SD4_DAT2__SD4_DATA2	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> -	MX6_PAD_SD4_DAT3__SD4_DATA3	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> -	MX6_PAD_SD4_DAT4__SD4_DATA4	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> -	MX6_PAD_SD4_DAT5__SD4_DATA5	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> -	MX6_PAD_SD4_DAT6__SD4_DATA6	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> -	MX6_PAD_SD4_DAT7__SD4_DATA7	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> -	MX6_PAD_NANDF_ALE__SD4_RESET	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> -};
> -
> -void displ5_set_iomux_usdhc_spl(void)
> -{
> -	SETUP_IOMUX_PADS(usdhc4_pads);
> -}
> -
> -#else
> -void displ5_set_iomux_usdhc_spl(void) {} -#endif diff --git
> a/board/liebherr/display5/common.h b/board/liebherr/display5/common.h
> index 4eb70dc42f..44c7470074 100644
> --- a/board/liebherr/display5/common.h
> +++ b/board/liebherr/display5/common.h
> @@ -31,9 +31,4 @@
>  #define ENET_PAD_CTRL_CLK  ((PAD_CTL_PUS_100K_UP &
> ~PAD_CTL_PKE) | \
>  	PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
> 
> -void displ5_set_iomux_uart_spl(void);
> -void displ5_set_iomux_ecspi_spl(void);
> -void displ5_set_iomux_usdhc_spl(void);
> -void displ5_set_iomux_misc_spl(void);
> -
>  #endif /* __DISPL5_COMMON_H_ */
> diff --git a/board/liebherr/display5/spl.c b/board/liebherr/display5/spl.c index
> 0c0172e201..3c2587c558 100644
> --- a/board/liebherr/display5/spl.c
> +++ b/board/liebherr/display5/spl.c
> @@ -104,6 +104,80 @@ static const struct mx6_ddr3_cfg
> mt41k128m16jt_125 = {
>  	.trasmin = 3500,
>  };
> 
> +iomux_v3_cfg_t const uart_console_pads[] = {
> +	/* UART5 */
> +	MX6_PAD_CSI0_DAT14__UART5_TX_DATA |
> MUX_PAD_CTRL(UART_PAD_CTRL),
> +	MX6_PAD_CSI0_DAT15__UART5_RX_DATA |
> MUX_PAD_CTRL(UART_PAD_CTRL),
> +	MX6_PAD_CSI0_DAT18__UART5_RTS_B |
> MUX_PAD_CTRL(UART_PAD_CTRL),
> +	MX6_PAD_CSI0_DAT19__UART5_CTS_B |
> MUX_PAD_CTRL(UART_PAD_CTRL), };
> +
> +void displ5_set_iomux_uart_spl(void)
> +{
> +	SETUP_IOMUX_PADS(uart_console_pads);
> +}
> +
> +iomux_v3_cfg_t const misc_pads_spl[] = {
> +	/* Emergency recovery pin */
> +	MX6_PAD_EIM_D29__GPIO3_IO29 |
> MUX_PAD_CTRL(NO_PAD_CTRL), };
> +
> +void displ5_set_iomux_misc_spl(void)
> +{
> +	SETUP_IOMUX_PADS(misc_pads_spl);
> +}
> +
> +#ifdef CONFIG_MXC_SPI
> +iomux_v3_cfg_t const ecspi2_pads[] = {
> +	/* SPI2, NOR Flash nWP, CS0 */
> +	MX6_PAD_CSI0_DAT10__ECSPI2_MISO	|
> MUX_PAD_CTRL(SPI_PAD_CTRL),
> +	MX6_PAD_CSI0_DAT9__ECSPI2_MOSI	|
> MUX_PAD_CTRL(SPI_PAD_CTRL),
> +	MX6_PAD_CSI0_DAT8__ECSPI2_SCLK	|
> MUX_PAD_CTRL(SPI_PAD_CTRL),
> +	MX6_PAD_CSI0_DAT11__GPIO5_IO29	|
> MUX_PAD_CTRL(NO_PAD_CTRL),
> +	MX6_PAD_SD3_DAT5__GPIO7_IO00	|
> MUX_PAD_CTRL(NO_PAD_CTRL),
> +};
> +
> +int board_spi_cs_gpio(unsigned int bus, unsigned int cs) {
> +	if (bus != 1 || cs != 0)
> +		return -EINVAL;
> +
> +	return IMX_GPIO_NR(5, 29);
> +}
> +
> +void displ5_set_iomux_ecspi_spl(void)
> +{
> +	SETUP_IOMUX_PADS(ecspi2_pads);
> +}
> +
> +#else
> +void displ5_set_iomux_ecspi_spl(void) {} #endif
> +
> +#ifdef CONFIG_FSL_ESDHC
> +iomux_v3_cfg_t const usdhc4_pads[] = {
> +	MX6_PAD_SD4_CLK__SD4_CLK	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +	MX6_PAD_SD4_CMD__SD4_CMD	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +	MX6_PAD_SD4_DAT0__SD4_DATA0	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +	MX6_PAD_SD4_DAT1__SD4_DATA1	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +	MX6_PAD_SD4_DAT2__SD4_DATA2	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +	MX6_PAD_SD4_DAT3__SD4_DATA3	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +	MX6_PAD_SD4_DAT4__SD4_DATA4	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +	MX6_PAD_SD4_DAT5__SD4_DATA5	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +	MX6_PAD_SD4_DAT6__SD4_DATA6	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +	MX6_PAD_SD4_DAT7__SD4_DATA7	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +	MX6_PAD_NANDF_ALE__SD4_RESET	|
> MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +};
> +
> +void displ5_set_iomux_usdhc_spl(void)
> +{
> +	SETUP_IOMUX_PADS(usdhc4_pads);
> +}
> +
> +#else
> +void displ5_set_iomux_usdhc_spl(void) {} #endif
> +
>  static void ccgr_init(void)
>  {
>  	struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;

Reviewed-by: Peng Fan <peng.fan at nxp.com>

> --
> 2.11.0