[U-Boot] [PATCH 00/15] Add Intel Agilex SoC support

Ley Foon Tan lftan.linux at gmail.com
Mon Jun 10 06:31:33 UTC 2019

On Thu, May 30, 2019 at 5:03 PM Ley Foon Tan <ley.foon.tan at intel.com> wrote:
> This is 2nd version of patchset to add Intel Agilex SoC[1] support.
> This patchset needs to apply after patch in [2] for Designware i2c clock from DM.
> Intel Agilex SoC is with a 64-bit quad core ARM Cortex-A53 MPCore
> hard processor system (HPS). New IPs in Agilex are CCU, clock manager and SDRAM,
> other IPs have minor changes compared to Stratix 10.
> Intel Agilex HPS TRM:
> https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/agilex/mnl-1100.pdf
> v1->v2:
> -------
> - Change clock driver to DM
> - Reuse base_addr_s10.h from S10
> - Add system_manager_s10_agilex_common.h
> - Update commit message for CCU patch
> - Update Linux commit id in dts/dtsi patch

Any comment on this v2 patch series?


Ley Foon

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