[U-Boot] Regression in U-boot v2019-07-rcX

[Bin Meng]

On Wed, Jun 12, 2019 at 9:49 PM Andy Shevchenko
<andriy.shevchenko at linux.intel.com> wrote:
>
> On Wed, Jun 12, 2019 at 04:23:37PM +0300, Andy Shevchenko wrote:
> > On Wed, Jun 12, 2019 at 04:18:25PM +0300, Andy Shevchenko wrote:
> > > Hi!
> > >
> > > I have noticed today the regression in newer U-Boot.
> > > For now I'm not sure which version is affected first. At least v2019.07-rc4
> > > behaves badly.
> > >
> > > Under badly I mean the following. Consider the output at the boot time:
> > >
> > > U-Boot 2019.07-rc4-00012-gcea7942d57 (Jun 12 2019 - 16:08:09 +0300)
> > >
> > > CPU:   Intel(R) Atom(TM) CPU  U1000  @  500MHz
> > > DRAM:  980.6 MiB
> > > MMC:   mmc at ff3fc000: 0, mmc at ff3fa000: 1
> > > Loading Environment from MMC... OK
> > > In:    serial
> > > Out:   serial
> > > Err:   serial
> > > Net:   No ethernet found.
> > > Hit any key to stop autoboot:  0
> > >
> > > Note lines started with DRAM: and MMC:. Now the 4 seconds (!) time is passed
> > > between them.
> > >
> > > On top of that DFU seems twice slower (on the glance, I haven't measure with
> > > `time` yet).
> > >
> > > Any ideas, while I'll try to allocate some time to investigate myself?
> > >
> > > P.S. The board I'm testing with is Intel Edison. I think no need to tell that
> > > nothing has been changed except the base (I'm rebased my stuff on top of latest
> > > and greatest U-Boot releases).
> >
> > v2019.07-rc1 is NOT affected!
> >
> > The time difference with DFU:
> > -rc1: real    0m1.114s
> > -rc4: real    0m2.691s
>
>
> The culprit commit is:
>
> commit 665cb18ea64aabbeb03d27a4c92ddec1baccb87a
> Author: Simon Glass <sjg at chromium.org>
> Date:   Thu Apr 25 21:59:06 2019 -0600
>
>     x86: Don't set up MTRRs in SPL
>
>
> Please revert ASAP before release, thanks!

So it looks that MTRRs are not programmed for Intel Edison to enable cache?

Simon, would you please take a look? I suspect simply revert this will
break the Chromebook SPL build?

Regards,
Bin