[U-Boot] [PATCH v3] armv8: fsl-lsch2: add clock support for the second eSDHC
prabhakar.kushwaha at nxp.com
Wed Jun 19 11:43:03 UTC 2019
> -----Original Message-----
> From: Yinbo Zhu <yinbo.zhu at nxp.com>
> Sent: Monday, June 3, 2019 4:54 PM
> To: York Sun <york.sun at nxp.com>; u-boot at lists.denx.de; Prabhakar Kushwaha
> <prabhakar.kushwaha at nxp.com>; Vabhav Sharma <vabhav.sharma at nxp.com>;
> Ashish Kumar <ashish.kumar at nxp.com>
> Cc: Yinbo Zhu <yinbo.zhu at nxp.com>; Xiaobo Xie <xiaobo.xie at nxp.com>; Jiafei
> Pan <jiafei.pan at nxp.com>; Y.b. Lu <yangbo.lu at nxp.com>; Jagdish Gediya
> <jagdish.gediya at nxp.com>
> Subject: [PATCH v3] armv8: fsl-lsch2: add clock support for the second eSDHC
> Layerscape began to use two eSDHC controllers, for example, LS1012A. They
> are same IP block with same reference clock.
> This patch is to add clock support for the second eSDHC.
> Signed-off-by: Yinbo Zhu <yinbo.zhu at nxp.com>
> Change in v2:
> Update the Copyright information
> Change in v3:
> Add "* Copyright 2019 NXP."
> arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 2 ++
> 1 file changed, 2 insertions(+)
This patch has been applied to fsl-qoriq master, awaiting upstream.
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