[U-Boot] [PATCH 6/6] ARM: uniphier: move sg_set_{pinsel, iectrl} to more relevant places
Masahiro Yamada
yamada.masahiro at socionext.com
Fri Jun 28 17:38:06 UTC 2019
Move the sg_set_pinsel macro to arch/arm/mach-uniphier/arm32/debug_ll.S
since it is not used anywhere else.
Move the C functions sg_set_{pinsel,iectrl} to debug-uart.c since they
are not used anywhere else.
Signed-off-by: Masahiro Yamada <yamada.masahiro at socionext.com>
---
arch/arm/mach-uniphier/arm32/debug_ll.S | 8 ++++
.../arm/mach-uniphier/debug-uart/debug-uart.c | 28 +++++++++++++
.../arm/mach-uniphier/debug-uart/debug-uart.h | 4 ++
arch/arm/mach-uniphier/sg-regs.h | 42 -------------------
4 files changed, 40 insertions(+), 42 deletions(-)
diff --git a/arch/arm/mach-uniphier/arm32/debug_ll.S b/arch/arm/mach-uniphier/arm32/debug_ll.S
index c68522f9c5..e56e1f679c 100644
--- a/arch/arm/mach-uniphier/arm32/debug_ll.S
+++ b/arch/arm/mach-uniphier/arm32/debug_ll.S
@@ -21,6 +21,14 @@
#define BAUDRATE 115200
#define DIV_ROUND(x, d) (((x) + ((d) / 2)) / (d))
+.macro sg_set_pinsel, pin, muxval, mux_bits, reg_stride, ra, rd
+ ldr \ra, =(SG_PINCTRL_BASE + \pin * \mux_bits / 32 * \reg_stride)
+ ldr \rd, [\ra]
+ and \rd, \rd, #~(((1 << \mux_bits) - 1) << (\pin * \mux_bits % 32))
+ orr \rd, \rd, #(\muxval << (\pin * \mux_bits % 32))
+ str \rd, [\ra]
+.endm
+
ENTRY(debug_ll_init)
ldr r0, =SG_REVISION
ldr r1, [r0]
diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart.c b/arch/arm/mach-uniphier/debug-uart/debug-uart.c
index db2904b553..bc96b2e7be 100644
--- a/arch/arm/mach-uniphier/debug-uart/debug-uart.c
+++ b/arch/arm/mach-uniphier/debug-uart/debug-uart.c
@@ -8,6 +8,7 @@
#include <linux/io.h>
#include <linux/serial_reg.h>
+#include "../sg-regs.h"
#include "../soc-info.h"
#include "debug-uart.h"
@@ -26,6 +27,33 @@ static void _debug_uart_putc(int c)
writel(c, base + UNIPHIER_UART_TX);
}
+#ifdef CONFIG_SPL_BUILD
+void sg_set_pinsel(unsigned int pin, unsigned int muxval,
+ unsigned int mux_bits, unsigned int reg_stride)
+{
+ unsigned int shift = pin * mux_bits % 32;
+ unsigned long reg = SG_PINCTRL_BASE + pin * mux_bits / 32 * reg_stride;
+ u32 mask = (1U << mux_bits) - 1;
+ u32 tmp;
+
+ tmp = readl(reg);
+ tmp &= ~(mask << shift);
+ tmp |= (mask & muxval) << shift;
+ writel(tmp, reg);
+}
+
+void sg_set_iectrl(unsigned int pin)
+{
+ unsigned int bit = pin % 32;
+ unsigned long reg = SG_IECTRL + pin / 32 * 4;
+ u32 tmp;
+
+ tmp = readl(reg);
+ tmp |= 1 << bit;
+ writel(tmp, reg);
+}
+#endif
+
void _debug_uart_init(void)
{
#ifdef CONFIG_SPL_BUILD
diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart.h b/arch/arm/mach-uniphier/debug-uart/debug-uart.h
index 689da7cf27..f4e98c0bb0 100644
--- a/arch/arm/mach-uniphier/debug-uart/debug-uart.h
+++ b/arch/arm/mach-uniphier/debug-uart/debug-uart.h
@@ -13,4 +13,8 @@ unsigned int uniphier_pro5_debug_uart_init(void);
unsigned int uniphier_pxs2_debug_uart_init(void);
unsigned int uniphier_ld6b_debug_uart_init(void);
+void sg_set_pinsel(unsigned int pin, unsigned int muxval,
+ unsigned int mux_bits, unsigned int reg_stride);
+void sg_set_iectrl(unsigned int pin);
+
#endif /* _MACH_DEBUG_UART_H */
diff --git a/arch/arm/mach-uniphier/sg-regs.h b/arch/arm/mach-uniphier/sg-regs.h
index 8aed826c96..39ffed5885 100644
--- a/arch/arm/mach-uniphier/sg-regs.h
+++ b/arch/arm/mach-uniphier/sg-regs.h
@@ -87,46 +87,4 @@
#define SG_PINMON0_CLK_MODE_AXOSEL_20480KHZ (0x2 << 16)
#define SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ_A (0x3 << 16)
-#ifdef __ASSEMBLY__
-
- .macro sg_set_pinsel, pin, muxval, mux_bits, reg_stride, ra, rd
- ldr \ra, =(SG_PINCTRL_BASE + \pin * \mux_bits / 32 * \reg_stride)
- ldr \rd, [\ra]
- and \rd, \rd, #~(((1 << \mux_bits) - 1) << (\pin * \mux_bits % 32))
- orr \rd, \rd, #(\muxval << (\pin * \mux_bits % 32))
- str \rd, [\ra]
- .endm
-
-#else
-
-#include <linux/types.h>
-#include <linux/io.h>
-
-static inline void sg_set_pinsel(unsigned pin, unsigned muxval,
- unsigned mux_bits, unsigned reg_stride)
-{
- unsigned shift = pin * mux_bits % 32;
- unsigned long reg = SG_PINCTRL_BASE + pin * mux_bits / 32 * reg_stride;
- u32 mask = (1U << mux_bits) - 1;
- u32 tmp;
-
- tmp = readl(reg);
- tmp &= ~(mask << shift);
- tmp |= (mask & muxval) << shift;
- writel(tmp, reg);
-}
-
-static inline void sg_set_iectrl(unsigned pin)
-{
- unsigned bit = pin % 32;
- unsigned long reg = SG_IECTRL + pin / 32 * 4;
- u32 tmp;
-
- tmp = readl(reg);
- tmp |= 1 << bit;
- writel(tmp, reg);
-}
-
-#endif /* __ASSEMBLY__ */
-
#endif /* UNIPHIER_SG_REGS_H */
--
2.17.1
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