[U-Boot] [PATCH 2/2] watchdog: designware: Convert to DM and DT probing

[Marek Vasut]

On 10/3/19 9:18 PM, Simon Goldschmidt wrote:
> Am 03.10.2019 um 21:12 schrieb Marek Vasut:
>> [...]
>>>>>>> Are you aware that DM WDT is enabled in SPL by default for gen5
>>>>>>> now? I
>>>>>> get
>>>>>>> a message that WDT is not found. I haven't sent a patch to fix that
>>>> yet,
>>>>>>> since the message is the only thing that happens, works normally
>>>>>> otherwise.
>>>>>>>
>>>>>>> But if you're working on that, you might check side effects of that
>>>>>> setting
>>>>>>> (which is new for this release).
>>>>>>
>>>>>> That doesn't sound right, the SoCFPGA core code uses HW_WATCHDOG
>>>>>> in some
>>>>>> places as Ley pointed out, so if DM WDT is enabled in SPL, that
>>>>>> code in
>>>>>> HW_WATCHDOG ifdefs isn't used. And I think that will trigger some
>>>>>> weird
>>>>>> problems. So in the end, enabling DM watchdog in SoCFPGA SPL right
>>>>>> now
>>>>>> is a bug ?
>>>>>>
>>>>>
>>>>> Hmm, it probably is. I'm not using  a watchdog right now, so I
>>>>> couldn't
>>>>> really tell... It'll be a week or so until I'll find the time for
>>>>> u-boot
>>>>> again :-(
>>>>
>>>> We probably should fix that before the release though.
>>>>
>>>
>>> If it's a problem, then yes, we should. Let me see if I can squeeze
>>> it in
>>> tomorrow...
>>
>> Thanks
>>
>> I almost suspect it's one of my WDT DM conversion patches which caused
>> this.
> 
> Hehe, a fast blame on github shows me you're right :-)
> 
> The problem is that SPL_WATCHDOG_SUPPORT (which is selected by
> ARCH_SOCFPGA) implies SPL_WDT if !HW_WATCHDOG. Now for my board,
> HW_WATCHDOG is obviously disabled. I'd have to check the mainline gen5
> boards though...
> 
> I'll try to check socfpga_socrates tomorrow and check the other boards
> by comparing the defconfigs.

Thanks