[U-Boot] [PATCH 3/8] ARM: socfpga: arria10: Add common u-boot devicetree include

[Dalon Westergreen]

From: Dalon Westergreen <dalon.westergreen at intel.com>

Add a common u-boot devicetree include file for the SocFPGA
Arria10 device.

Signed-off-by: Dalon Westergreen <dalon.westergreen at intel.com>
---
 .../dts/socfpga_arria10-common-u-boot.dtsi    | 206 ++++++++++++++++++
 1 file changed, 206 insertions(+)
 create mode 100644 arch/arm/dts/socfpga_arria10-common-u-boot.dtsi

diff --git a/arch/arm/dts/socfpga_arria10-common-u-boot.dtsi b/arch/arm/dts/socfpga_arria10-common-u-boot.dtsi
new file mode 100644
index 0000000000..bd4f1271f3
--- /dev/null
+++ b/arch/arm/dts/socfpga_arria10-common-u-boot.dtsi
@@ -0,0 +1,206 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright Altera Corporation (C) 2014. All rights reserved.
+ */
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	chosen {
+		tick-timer = &timer2;
+		u-boot,dm-pre-reloc;
+	};
+
+	memory at 0 {
+		u-boot,dm-pre-reloc;
+	};
+
+	soc {
+		u-boot,dm-pre-reloc;
+
+		clkmgr at ffd04000 {
+			u-boot,dm-pre-reloc;
+
+			clocks {
+					u-boot,dm-pre-reloc;
+
+					cb_intosc_hs_div2_clk {
+						u-boot,dm-pre-reloc;
+					};
+
+					cb_intosc_ls_clk {
+						u-boot,dm-pre-reloc;
+					};
+
+					f2s_free_clk {
+						u-boot,dm-pre-reloc;
+					};
+
+					osc1 {
+						u-boot,dm-pre-reloc;
+					};
+
+					main_pll at 40 {
+						u-boot,dm-pre-reloc;
+
+						main_mpu_base_clk {
+							u-boot,dm-pre-reloc;
+						};
+
+						main_noc_base_clk {
+							u-boot,dm-pre-reloc;
+						};
+
+						main_emaca_clk at 68 {
+							u-boot,dm-pre-reloc;
+						};
+
+						main_emacb_clk at 6c {
+							u-boot,dm-pre-reloc;
+						};
+
+						main_emac_ptp_clk at 70 {
+							u-boot,dm-pre-reloc;
+						};
+
+						main_gpio_db_clk at 74 {
+							u-boot,dm-pre-reloc;
+						};
+
+						main_sdmmc_clk at 78 {
+							u-boot,dm-pre-reloc;
+						};
+
+						main_s2f_usr0_clk at 7c {
+							u-boot,dm-pre-reloc;
+						};
+
+						main_s2f_usr1_clk at 80 {
+							u-boot,dm-pre-reloc;
+						};
+
+						main_hmc_pll_ref_clk at 84 {
+							u-boot,dm-pre-reloc;
+						};
+
+						main_periph_ref_clk at 9c {
+							u-boot,dm-pre-reloc;
+						};
+					};
+
+					periph_pll at c0 {
+						u-boot,dm-pre-reloc;
+
+						peri_mpu_base_clk {
+							u-boot,dm-pre-reloc;
+						};
+
+						peri_noc_base_clk {
+							u-boot,dm-pre-reloc;
+						};
+
+						peri_emaca_clk at e8 {
+							u-boot,dm-pre-reloc;
+						};
+
+						peri_emacb_clk at ec {
+							u-boot,dm-pre-reloc;
+						};
+
+						peri_emac_ptp_clk at f0 {
+							u-boot,dm-pre-reloc;
+						};
+
+						peri_gpio_db_clk at f4 {
+							u-boot,dm-pre-reloc;
+						};
+
+						peri_sdmmc_clk at f8 {
+							u-boot,dm-pre-reloc;
+						};
+
+						peri_s2f_usr0_clk at fc {
+							u-boot,dm-pre-reloc;
+						};
+
+						peri_s2f_usr1_clk at 100 {
+							u-boot,dm-pre-reloc;
+						};
+
+						peri_hmc_pll_ref_clk at 104 {
+							u-boot,dm-pre-reloc;
+						};
+					};
+
+					mpu_free_clk at 60 {
+						u-boot,dm-pre-reloc;
+					};
+
+					noc_free_clk at 64 {
+						u-boot,dm-pre-reloc;
+					};
+
+					s2f_user1_free_clk at 104 {
+						u-boot,dm-pre-reloc;
+					};
+
+					sdmmc_free_clk at f8 {
+						u-boot,dm-pre-reloc;
+					};
+
+					l4_sys_free_clk {
+						u-boot,dm-pre-reloc;
+					};
+
+					l4_main_clk {
+						u-boot,dm-pre-reloc;
+					};
+
+					l4_mp_clk {
+						u-boot,dm-pre-reloc;
+					};
+
+					l4_sp_clk {
+						u-boot,dm-pre-reloc;
+					};
+
+					mpu_periph_clk {
+						u-boot,dm-pre-reloc;
+					};
+
+					sdmmc_clk {
+						u-boot,dm-pre-reloc;
+					};
+
+					qspi_clk {
+						u-boot,dm-pre-reloc;
+					};
+
+					nand_clk {
+						u-boot,dm-pre-reloc;
+					};
+
+					spi_m_clk {
+						u-boot,dm-pre-reloc;
+					};
+
+					usb_clk {
+						u-boot,dm-pre-reloc;
+					};
+
+					s2f_usr1_clk {
+						u-boot,dm-pre-reloc;
+					};
+				};
+		};
+	};
+};
+
+&rst {
+	u-boot,dm-pre-reloc;
+};
+
+&timer2 {
+	u-boot,dm-pre-reloc;
+};
-- 
2.21.0