[U-Boot] [PATCH 058/126] sandbox: pci: Create a new sandbox_pci_read_bar() function

[Bin Meng]

On Wed, Sep 25, 2019 at 10:58 PM Simon Glass <sjg at chromium.org> wrote:
>
> The code in swapcase can be used by other sandbox drivers. Move it into a
> common place to allow this.
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
>  arch/sandbox/include/asm/test.h | 15 +++++++++++++++
>  drivers/misc/Makefile           |  2 +-
>  drivers/misc/swap_case.c        | 18 +++---------------
>  drivers/pci/pci-emul-uclass.c   | 20 ++++++++++++++++++++
>  drivers/pci/pci_sandbox.c       |  1 +
>  5 files changed, 40 insertions(+), 16 deletions(-)
>
> diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h
> index 1b21af6bed7..cd2b9e3155d 100644
> --- a/arch/sandbox/include/asm/test.h
> +++ b/arch/sandbox/include/asm/test.h
> @@ -198,4 +198,19 @@ int sandbox_get_pch_spi_protect(struct udevice *dev);
>   */
>  int sandbox_get_pci_ep_irq_count(struct udevice *dev);
>
> +/**
> + * sandbox_pci_read_bar() - Read the BAR value for a read_config operation
> + *
> + * This is used in PCI emulators to read a base address reset. This has special
> + * rules because when the register is set to 0xffffffff it can be used to
> + * discover the type and size of the BAR.
> + *
> + * @barval: Current value of the BAR
> + * @type: Type of BAR (PCI_BASE_ADDRESS_SPACE_IO or
> + *             PCI_BASE_ADDRESS_MEM_TYPE_32)
> + * @size: Size of BAR in bytes
> + * @return BAR value to return from emulator
> + */
> +uint sandbox_pci_read_bar(u32 barval, int type, uint size);
> +
>  #endif
> diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
> index 509c588582d..0001d105bae 100644
> --- a/drivers/misc/Makefile
> +++ b/drivers/misc/Makefile
> @@ -12,6 +12,7 @@ obj-$(CONFIG_$(SPL_TPL_)CROS_EC_LPC) += cros_ec_lpc.o
>  ifndef CONFIG_SPL_BUILD
>  obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
>  obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
> +obj-$(CONFIG_SANDBOX) += swap_case.o
>  endif
>
>  ifdef CONFIG_DM_I2C
> @@ -52,7 +53,6 @@ obj-$(CONFIG_PCA9551_LED) += pca9551_led.o
>  obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o
>  obj-$(CONFIG_QFW) += qfw.o
>  obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
> -obj-$(CONFIG_SANDBOX) += swap_case.o
>  obj-$(CONFIG_SANDBOX) += syscon_sandbox.o misc_sandbox.o
>  obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o
>  obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o
> diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c
> index 75fe6416707..11189d16c83 100644
> --- a/drivers/misc/swap_case.c
> +++ b/drivers/misc/swap_case.c
> @@ -139,25 +139,13 @@ static int sandbox_swap_case_read_config(struct udevice *emul, uint offset,
>         case PCI_BASE_ADDRESS_4:
>         case PCI_BASE_ADDRESS_5: {
>                 int barnum;
> -               u32 *bar, result;
> +               u32 *bar;
>
>                 barnum = pci_offset_to_barnum(offset);
>                 bar = &plat->bar[barnum];
>
> -               result = *bar;
> -               if (*bar == 0xffffffff) {
> -                       if (barinfo[barnum].type) {
> -                               result = (~(barinfo[barnum].size - 1) &
> -                                       PCI_BASE_ADDRESS_IO_MASK) |
> -                                       PCI_BASE_ADDRESS_SPACE_IO;
> -                       } else {
> -                               result = (~(barinfo[barnum].size - 1) &
> -                                       PCI_BASE_ADDRESS_MEM_MASK) |
> -                                       PCI_BASE_ADDRESS_MEM_TYPE_32;
> -                       }
> -               }
> -               debug("r bar %d=%x\n", barnum, result);
> -               *valuep = result;
> +               *valuep = sandbox_pci_read_bar(*bar, barinfo[barnum].type,
> +                                              barinfo[barnum].size);
>                 break;
>         }
>         case PCI_CAPABILITY_LIST:
> diff --git a/drivers/pci/pci-emul-uclass.c b/drivers/pci/pci-emul-uclass.c
> index a70c5e7633d..6e6172836a4 100644
> --- a/drivers/pci/pci-emul-uclass.c
> +++ b/drivers/pci/pci-emul-uclass.c
> @@ -43,6 +43,26 @@ int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn,
>         return *emulp ? 0 : -ENODEV;
>  }
>
> +uint sandbox_pci_read_bar(u32 barval, int type, uint size)
> +{
> +       u32 result;
> +
> +       result = barval;
> +       if (result == 0xffffffff) {
> +               if (type == PCI_BASE_ADDRESS_SPACE_IO) {
> +                       result = (~(size - 1) &
> +                               PCI_BASE_ADDRESS_IO_MASK) |
> +                               PCI_BASE_ADDRESS_SPACE_IO;
> +               } else {
> +                       result = (~(size - 1) &
> +                               PCI_BASE_ADDRESS_MEM_MASK) |
> +                               PCI_BASE_ADDRESS_MEM_TYPE_32;
> +               }
> +       }
> +
> +       return result;
> +}
> +
>  static int sandbox_pci_emul_post_probe(struct udevice *dev)
>  {
>         struct sandbox_pci_emul_priv *priv = dev->uclass->priv;
> diff --git a/drivers/pci/pci_sandbox.c b/drivers/pci/pci_sandbox.c
> index 2af2b79c05d..2a38d104a09 100644
> --- a/drivers/pci/pci_sandbox.c
> +++ b/drivers/pci/pci_sandbox.c
> @@ -8,6 +8,7 @@
>  #include <dm.h>
>  #include <fdtdec.h>
>  #include <pci.h>
> +#include <asm/test.h>

This change is not needed.

>
>  #define FDT_DEV_INFO_CELLS     4
>  #define FDT_DEV_INFO_SIZE      (FDT_DEV_INFO_CELLS * sizeof(u32))
> --

Reviewed-by: Bin Meng <bmeng.cn at gmail.com>

Regards,
Bin