[U-Boot] [PATCH 9/9] mpc85xx, socrates: add DM PCI support

Heiko Schocher hs at denx.de
Wed Oct 9 05:11:10 UTC 2019


add DM PCI support on the socrates board.
use PCIE_FSL now.

Signed-off-by: Heiko Schocher <hs at denx.de>
---

 arch/powerpc/dts/socrates.dts |  1 +
 board/socrates/law.c          |  2 --
 board/socrates/socrates.c     | 40 +++++------------------------------
 configs/socrates_defconfig    |  7 ++++++
 include/configs/socrates.h    |  9 --------
 5 files changed, 13 insertions(+), 46 deletions(-)

diff --git a/arch/powerpc/dts/socrates.dts b/arch/powerpc/dts/socrates.dts
index 452cf58b5e..af3fa92fff 100644
--- a/arch/powerpc/dts/socrates.dts
+++ b/arch/powerpc/dts/socrates.dts
@@ -332,6 +332,7 @@
 		device_type = "pci";
 		reg = <0xe0008000 0x1000>;
 		clock-frequency = <66666666>;
+		law_trgt_if = <0>;
 
 		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 		interrupt-map = <
diff --git a/board/socrates/law.c b/board/socrates/law.c
index 44703e8aca..840941b63e 100644
--- a/board/socrates/law.c
+++ b/board/socrates/law.c
@@ -31,9 +31,7 @@
 
 struct law_entry law_table[] = {
 	SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR),
-	SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI),
 	SET_LAW(CONFIG_SYS_LBC_FLASH_BASE, LAW_SIZE_64M, LAW_TRGT_IF_LBC),
-	SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI),
 #if defined(CONFIG_SYS_FPGA_BASE)
 	SET_LAW(CONFIG_SYS_FPGA_BASE, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
 #endif
diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c
index 8549883508..5f58b4c21b 100644
--- a/board/socrates/socrates.c
+++ b/board/socrates/socrates.c
@@ -50,7 +50,7 @@ int checkboard (void)
 	}
 	putc('\n');
 
-#ifdef CONFIG_PCI
+#if defined(CONFIG_PCI) || defined(CONFIG_DM_PCI)
 	/* Check the PCI_clk sel bit */
 	if (in_be32(&gur->porpllsr) & (1<<15)) {
 		src = "SYSCLK";
@@ -126,6 +126,10 @@ int misc_init_r (void)
 			       &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
 	}
 
+#if defined(CONFIG_DM_PCI)
+	pci_init();
+#endif
+
 	return 0;
 }
 
@@ -168,40 +172,6 @@ void local_bus_init (void)
 	upmconfig (UPMB, (uint *)UPMTableB, sizeof(UPMTableB)/sizeof(int));
 }
 
-#if defined(CONFIG_PCI)
-/*
- * Initialize PCI Devices, report devices found.
- */
-
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_mpc85xxads_config_table[] = {
-	{PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
-	 PCI_IDSEL_NUMBER, PCI_ANY_ID,
-	 pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
-				     PCI_ENET0_MEMADDR,
-				     PCI_COMMAND_MEMORY |
-				     PCI_COMMAND_MASTER}},
-	{}
-};
-#endif
-
-
-static struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
-	config_table:pci_mpc85xxads_config_table,
-#endif
-};
-
-#endif /* CONFIG_PCI */
-
-
-void pci_init_board (void)
-{
-#ifdef CONFIG_PCI
-	pci_mpc85xx_init (&hose);
-#endif /* CONFIG_PCI */
-}
-
 #ifdef CONFIG_BOARD_EARLY_INIT_R
 int board_early_init_r (void)
 {
diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index 5bd60e0886..bda436ad62 100644
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -14,6 +14,10 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_BOARD_EARLY_INIT_R=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_REGINFO=y
+# CONFIG_BOOTM_NETBSD is not set
+# CONFIG_BOOTM_PLAN9 is not set
+# CONFIG_BOOTM_RTEMS is not set
+# CONFIG_BOOTM_VXWORKS is not set
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_DM=y
 CONFIG_CMD_I2C=y
@@ -44,6 +48,8 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_PHY_MARVELL=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_PCI=y
+CONFIG_PCIE_FSL=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_RX8025=y
 CONFIG_SPECIFY_CONSOLE_INDEX=y
@@ -53,4 +59,5 @@ CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 # CONFIG_USB_EHCI_HCD is not set
+CONFIG_USB_OHCI_PCI=y
 CONFIG_USB_STORAGE=y
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 7adaa344bc..a03005902f 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -19,8 +19,6 @@
 /* High Level Configuration Options */
 #define CONFIG_SOCRATES		1
 
-#define CONFIG_PCI_INDIRECT_BRIDGE
-
 /*
  * Only possible on E500 Version 2 or newer cores.
  */
@@ -156,7 +154,6 @@
  * General PCI
  * Memory space is mapped 1-1.
  */
-#define CONFIG_SYS_PCI_PHYS		0x80000000	/* 1G PCI TLB */
 
 /* PCI is clocked by the external source at 33 MHz */
 #define CONFIG_PCI_CLK_FREQ	33000000
@@ -167,10 +164,6 @@
 #define CONFIG_SYS_PCI1_IO_PHYS	CONFIG_SYS_PCI1_IO_BASE
 #define CONFIG_SYS_PCI1_IO_SIZE	0x01000000	/* 16M			*/
 
-#if defined(CONFIG_PCI)
-#undef CONFIG_PCI_SCAN_SHOW		/* show pci devices on startup	*/
-#endif	/* CONFIG_PCI */
-
 #define CONFIG_TSEC1	1
 #define CONFIG_TSEC1_NAME	"TSEC0"
 #define CONFIG_TSEC3	1
@@ -292,8 +285,6 @@
 /* USB support */
 #define CONFIG_USB_OHCI_NEW		1
 #define CONFIG_PCI_OHCI			1
-#define CONFIG_PCI_OHCI_DEVNO		3 /* Number in PCI list */
-#define CONFIG_PCI_EHCI_DEVNO		(CONFIG_PCI_OHCI_DEVNO / 2)
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	15
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"ohci_pci"
 #define CONFIG_SYS_OHCI_SWAP_REG_ACCESS	1
-- 
2.21.0



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