[U-Boot] [PATCH v5 00/19] Add Intel Agilex SoC support

Ley Foon Tan ley.foon.tan at intel.com
Fri Oct 11 09:52:03 UTC 2019


This is 5th version of patchset to add Intel Agilex SoC[1] support.
Most of changes are related to move CCU driver to DM, remove *_manager_s10.h
and include *_manager_soc64.h directly. Detail changelog can find in
commit message.

This patchset needs to apply after patchset in [2] for manager driver
struct to defines conversion.

Patch status:
No change: Patch 1, 2, 9, 10, 13, 14, 15, 16
Have changes: Patch 3, 4, 5, 6, 7, 11, 17, 18, 19
New: Patch 8, 12

Intel Agilex SoC is with a 64-bit quad core ARM Cortex-A53 MPCore
hard processor system (HPS). New IPs in Agilex are CCU, clock manager and SDRAM,
other IPs have minor changes compared to Stratix 10.

Intel Agilex HPS TRM:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/agilex/mnl-1100.pdf

v4->v5:
-------
- Move CCU driver to DM
- Remove system_manager_s10.h and use system_manager_soc64.h directly.
- Remove reset_manager_s10.h and use reset_manager_soc64.h directly.
- Separate patch to fix INTOSC clock to 400MHz. [Patch 8]

History:
---------
[v1]: https://patchwork.ozlabs.org/cover/1097830/
[v2]: https://patchwork.ozlabs.org/cover/1127440/
[v3]: https://patchwork.ozlabs.org/cover/1149863/
[v4]: https://patchwork.ozlabs.org/cover/1161483/

[1]: https://www.intel.com/content/www/us/en/products/programmable/fpga/agilex.html
[2]: https://patchwork.ozlabs.org/cover/1174347/

Ley Foon Tan (19):
  arm: socfpga: agilex: Add base address for Intel Agilex SoC
  arm: socfpga: Move firewall code to firewall file
  arm: socfpga: Move Stratix10 and Agilex reset manager common code
  arm: socfpga: agilex: Add reset manager support
  arm: socfpga: Move Stratix10 and Agilex system manager common code
  arm: socfpga: agilex: Add system manager support
  arm: socfpga: Move Stratix10 and Agilex clock manager common code
  arm: socfpga: Fix CLKMGR_INTOSC_HZ to 400MHz
  clk: agilex: Add clock driver for Agilex
  arm: socfpga: agilex: Add clock wrapper functions
  cache: Add Arteris Ncore cache coherent unit driver
  drivers: Enable cache driver build in SPL
  arm: agilex: Add clock handoff offset for Agilex
  ddr: altera: Restructure Stratix 10 SDRAM driver
  ddr: altera: agilex: Add SDRAM driver for Agilex
  board: intel: agilex: Add socdk board support for Intel Agilex SoC
  arm: socfpga: agilex: Add SPL for Agilex SoC
  arm: dts: agilex: Add base dtsi and devkit dts
  arm: socfpga: agilex: Enable Agilex SoC build

 arch/arm/Kconfig                              |   4 +-
 arch/arm/dts/Makefile                         |   1 +
 arch/arm/dts/socfpga_agilex.dtsi              | 500 +++++++++++++++
 arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi |  79 +++
 arch/arm/dts/socfpga_agilex_socdk.dts         | 136 ++++
 arch/arm/mach-socfpga/Kconfig                 |  16 +
 arch/arm/mach-socfpga/Makefile                |  17 +
 arch/arm/mach-socfpga/clock_manager_agilex.c  |  84 +++
 arch/arm/mach-socfpga/clock_manager_s10.c     |   2 +-
 .../mach-socfpga/{spl_s10.c => firewall.c}    | 122 +---
 .../mach-socfpga/include/mach/base_addr_s10.h |   4 +
 .../mach-socfpga/include/mach/clock_manager.h |   2 +
 .../include/mach/clock_manager_agilex.h       |  14 +
 .../include/mach/clock_manager_s10.h          |  16 +-
 .../include/mach/clock_manager_soc64.h        |  23 +
 .../mach/{firewall_s10.h => firewall.h}       |  10 +-
 .../mach-socfpga/include/mach/handoff_s10.h   |   9 +-
 .../mach-socfpga/include/mach/reset_manager.h |   5 +-
 .../include/mach/reset_manager_s10.h          |  95 ---
 .../include/mach/reset_manager_soc64.h        |  38 ++
 .../include/mach/system_manager.h             |   5 +-
 .../include/mach/system_manager_s10.h         | 124 ----
 .../include/mach/system_manager_soc64.h       | 123 ++++
 arch/arm/mach-socfpga/mailbox_s10.c           |   2 +-
 arch/arm/mach-socfpga/misc.c                  |   4 +
 arch/arm/mach-socfpga/misc_s10.c              |   4 +-
 arch/arm/mach-socfpga/reset_manager_s10.c     |  34 +-
 arch/arm/mach-socfpga/spl_agilex.c            |  98 +++
 arch/arm/mach-socfpga/spl_s10.c               |  95 +--
 arch/arm/mach-socfpga/system_manager_s10.c    |  26 +-
 arch/arm/mach-socfpga/wrap_pll_config_s10.c   |  13 +-
 board/intel/agilex-socdk/MAINTAINERS          |   7 +
 board/intel/agilex-socdk/Makefile             |   7 +
 board/intel/agilex-socdk/socfpga.c            |   7 +
 configs/socfpga_agilex_defconfig              |  59 ++
 drivers/Makefile                              |   1 +
 drivers/cache/Kconfig                         |   8 +
 drivers/cache/Makefile                        |   1 +
 drivers/cache/cache-ncore.c                   | 164 +++++
 drivers/clk/altera/Makefile                   |   1 +
 drivers/clk/altera/clk-agilex.c               | 579 ++++++++++++++++++
 drivers/clk/altera/clk-agilex.h               | 237 +++++++
 drivers/ddr/altera/Kconfig                    |   6 +-
 drivers/ddr/altera/Makefile                   |   3 +-
 drivers/ddr/altera/sdram_agilex.c             | 168 +++++
 drivers/ddr/altera/sdram_s10.c                | 298 +--------
 drivers/ddr/altera/sdram_s10.h                | 148 +----
 drivers/ddr/altera/sdram_soc64.c              | 304 +++++++++
 .../ddr/altera/{sdram_s10.h => sdram_soc64.h} |  71 ++-
 include/configs/socfpga_agilex_socdk.h        | 207 +++++++
 .../dt-bindings/clock/socfpga-soc64-clock.h   |  84 +++
 51 files changed, 3101 insertions(+), 964 deletions(-)
 create mode 100644 arch/arm/dts/socfpga_agilex.dtsi
 create mode 100644 arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi
 create mode 100644 arch/arm/dts/socfpga_agilex_socdk.dts
 create mode 100644 arch/arm/mach-socfpga/clock_manager_agilex.c
 copy arch/arm/mach-socfpga/{spl_s10.c => firewall.c} (54%)
 create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_agilex.h
 create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_soc64.h
 rename arch/arm/mach-socfpga/include/mach/{firewall_s10.h => firewall.h} (94%)
 delete mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
 create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h
 delete mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_s10.h
 create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
 create mode 100644 arch/arm/mach-socfpga/spl_agilex.c
 create mode 100644 board/intel/agilex-socdk/MAINTAINERS
 create mode 100644 board/intel/agilex-socdk/Makefile
 create mode 100644 board/intel/agilex-socdk/socfpga.c
 create mode 100644 configs/socfpga_agilex_defconfig
 create mode 100644 drivers/cache/cache-ncore.c
 create mode 100644 drivers/clk/altera/clk-agilex.c
 create mode 100644 drivers/clk/altera/clk-agilex.h
 create mode 100644 drivers/ddr/altera/sdram_agilex.c
 create mode 100644 drivers/ddr/altera/sdram_soc64.c
 copy drivers/ddr/altera/{sdram_s10.h => sdram_soc64.h} (79%)
 create mode 100644 include/configs/socfpga_agilex_socdk.h
 create mode 100644 include/dt-bindings/clock/socfpga-soc64-clock.h

-- 
2.19.0



More information about the U-Boot mailing list