[U-Boot] [PATCH v2 15/26] arm: dts: k3-j721e-main: Add C71x DSP node

Tom Rini trini at konsulko.com
Sat Oct 12 20:25:26 UTC 2019

On Wed, Sep 04, 2019 at 04:01:40PM +0530, Lokesh Vutla wrote:

> The J721E SoCs have a single TMS320C71x DSP Subsystem in the MAIN
> voltage domain containing the next-generation C711 CPU core. The
> subsystem has 32 KB of L1D configurable SRAM/Cache and 512 KB of
> L2 configurable SRAM/Cache. This subsystem has a CMMU but is not
> used currently. The inter-processor communication between the main
> A72 cores and the C711 processor is achieved through shared memory
> and a Mailbox. Add the DT node for this DSP processor sub-system
> in the common k3-j721e-main.dtsi file.
> Signed-off-by: Suman Anna <s-anna at ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla at ti.com>

Applied to u-boot/master, thanks!

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