[U-Boot] [PATCH v2] arm: add initial support for the Phytium FT2004 SoC

Kever Yang kever.yang at rock-chips.com
Mon Oct 14 10:01:02 UTC 2019


Hi Steven,


On 2019/10/11 下午3:13, liu hao wrote:
> This adds platform code and the device tree for the Phytium FT2004 SoC.
> The initial support comprises the UART and the GMAC.
>
> v2:
> - Some printf() are removed or replace by debug(). @Tom
> - The ft2004_defconfig file is generated with savedefconfig.
>    @Tom, @Heinrich
>
> Cc: Tom Rini <trini at konsulko.com>
> Cc: Heinrich Schuchardt <xypron.glpk at gmx.de>
>
> Signed-off-by: Steven Hao <liuhao at phytium.com.cn>
> ---
>   MAINTAINERS                      |  6 +++
>   arch/arm/Kconfig                 |  8 ++++
>   arch/arm/dts/Makefile            |  2 +
>   arch/arm/dts/phytium-ft2004.dts  | 33 ++++++++++++++


Does the dts on mainline Kernel? If yes, it will be better to have a 
commit link of kernel version,

and patch will be better as separate patch.

>   board/phytium/ft2004/Kconfig     | 12 +++++
>   board/phytium/ft2004/MAINTAINERS |  8 ++++
>   board/phytium/ft2004/Makefile    |  9 ++++
>   board/phytium/ft2004/cpu.h       | 23 ++++++++++
>   board/phytium/ft2004/ft2004.c    | 95 ++++++++++++++++++++++++++++++++++++++++
>   configs/ft2004_defconfig         | 23 ++++++++++


Seems like the ft2004 is a SoC, do you have a board name for it? The 
config is more about

BOARD instead of SOC.


Thanks,

- Kever

>   include/configs/ft2004.h         | 24 ++++++++++
>   11 files changed, 243 insertions(+)
>   create mode 100644 arch/arm/dts/phytium-ft2004.dts
>   create mode 100644 board/phytium/ft2004/Kconfig
>   create mode 100644 board/phytium/ft2004/MAINTAINERS
>   create mode 100644 board/phytium/ft2004/Makefile
>   create mode 100644 board/phytium/ft2004/cpu.h
>   create mode 100644 board/phytium/ft2004/ft2004.c
>   create mode 100644 configs/ft2004_defconfig
>   create mode 100644 include/configs/ft2004.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index c536566..1f354b0 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -468,6 +468,12 @@ S:	Maintained
>   T:	git https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze.git
>   F:	arch/arm/mach-zynqmp-r5/
>   
> +ARM PHYTIUM
> +M:	liuhao <liuhao at phytium.com.cn>
> +M:	shuyiqi <shuyiqi at phytium.com.cn>
> +S:	Maintained
> +F:	arch/arm/dts/phytium-ft2004.dts
> +
>   BINMAN
>   M:	Simon Glass <sjg at chromium.org>
>   S:	Maintained
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 384e382..b4a7cb0 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -1612,6 +1612,13 @@ config ARCH_ASPEED
>   	select OF_CONTROL
>   	imply CMD_DM
>   
> +config TARGET_FT2004
> +	bool "Support Phytium FT2004 Platform"
> +	select ARM64
> +	help
> +	  Support for FT2004 platform.
> +	  It has 1GB Sdram, uart and gmac.
> +
>   endchoice
>   
>   config ARCH_SUPPORT_TFABOOT
> @@ -1812,6 +1819,7 @@ source "board/woodburn/Kconfig"
>   source "board/xilinx/Kconfig"
>   source "board/xilinx/zynq/Kconfig"
>   source "board/xilinx/zynqmp/Kconfig"
> +source "board/phytium/ft2004/Kconfig"
>   
>   source "arch/arm/Kconfig.debug"
>   
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 73d47f5..d6144fe 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -816,6 +816,8 @@ dtb-$(CONFIG_TARGET_VEXPRESS_CA5X2) += vexpress-v2p-ca5s.dtb
>   dtb-$(CONFIG_TARGET_VEXPRESS_CA9X4) += vexpress-v2p-ca9.dtb
>   dtb-$(CONFIG_TARGET_VEXPRESS_CA15_TC2) += vexpress-v2p-ca15_a7.dtb
>   
> +dtb-$(CONFIG_TARGET_FT2004) += phytium-ft2004.dtb
> +
>   targets += $(dtb-y)
>   
>   # Add any required device tree compiler flags here
> diff --git a/arch/arm/dts/phytium-ft2004.dts b/arch/arm/dts/phytium-ft2004.dts
> new file mode 100644
> index 0000000..e34cb09
> --- /dev/null
> +++ b/arch/arm/dts/phytium-ft2004.dts
> @@ -0,0 +1,33 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2019, Phytium Ltd.
> + * shuyiqi  <shuyiqi at phytium.com.cn>
> + */
> +
> +/dts-v1/;
> +
> +/ {
> +	model = "Phytium FT2004";
> +	compatible = "phytium,ft2004";
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	ethernet at 2820c000 {
> +		compatible = "st,stm32-dwmac";
> +		reg = <0x0 0x2820C000 0x0 0x2000>;
> +		phy-mode = "rgmii";
> +	};
> +
> +	ethernet at 28210000 {
> +		compatible = "st,stm32-dwmac";
> +		reg = <0x0 0x28210000 0x0 0x2000>;
> +		phy-mode = "rgmii";
> +	};
> +
> +	uart at 28001000 {
> +		compatible = "arm,pl011";
> +		reg = <0x0 0x28001000 0x0 0x1000>;
> +		clock = <48000000>;
> +	};
> +};
> +
> diff --git a/board/phytium/ft2004/Kconfig b/board/phytium/ft2004/Kconfig
> new file mode 100644
> index 0000000..865a609
> --- /dev/null
> +++ b/board/phytium/ft2004/Kconfig
> @@ -0,0 +1,12 @@
> +if TARGET_FT2004
> +
> +config SYS_BOARD
> +	default "ft2004"
> +
> +config SYS_VENDOR
> +	default "phytium"
> +
> +config SYS_CONFIG_NAME
> +	default "ft2004"
> +
> +endif
> diff --git a/board/phytium/ft2004/MAINTAINERS b/board/phytium/ft2004/MAINTAINERS
> new file mode 100644
> index 0000000..8ddbb23
> --- /dev/null
> +++ b/board/phytium/ft2004/MAINTAINERS
> @@ -0,0 +1,8 @@
> +FT2004 BOARD
> +M:	liuhao <liuhao at phytium.com.cn>
> +M:	shuyiqi <shuyiqi at phytium.com.cn>
> +S:	Maintained
> +F:	board/phytium/ft2004/*
> +F:	include/configs/ft2004.h
> +F:	configs/ft2004_defconfig
> +
> diff --git a/board/phytium/ft2004/Makefile b/board/phytium/ft2004/Makefile
> new file mode 100644
> index 0000000..e860789
> --- /dev/null
> +++ b/board/phytium/ft2004/Makefile
> @@ -0,0 +1,9 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (C) 2019
> +# shuyiqi  <shuyiqi at phytium.com.cn>
> +# liuhao   <liuhao at phytium.com.cn>
> +#
> +
> +obj-y += ft2004.o
> +
> diff --git a/board/phytium/ft2004/cpu.h b/board/phytium/ft2004/cpu.h
> new file mode 100644
> index 0000000..3574a6b
> --- /dev/null
> +++ b/board/phytium/ft2004/cpu.h
> @@ -0,0 +1,23 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * (C) Copyright 2019
> + * Phytium Technology Ltd <www.phytium.com>
> + * shuyiqi <shuyiqi at phytium.com.cn>
> + */
> +
> +#ifndef _FT2004_CPU_H
> +#define _FT2004_CPU_H
> +
> +/* FLUSH L3 CASHE */
> +#define HNF_COUNT           0x8
> +#define HNF_PSTATE_REQ      (HNF_BASE + 0x10)
> +#define HNF_PSTATE_STAT     (HNF_BASE + 0x18)
> +#define HNF_PSTATE_OFF      0x0
> +#define HNF_PSTATE_SFONLY   0x1
> +#define HNF_PSTATE_HALF     0x2
> +#define HNF_PSTATE_FULL     0x3
> +#define HNF_STRIDE          0x10000
> +#define HNF_BASE		(unsigned long)(0x3A200000)
> +
> +#endif /* _FT2004_CPU_H */
> +
> diff --git a/board/phytium/ft2004/ft2004.c b/board/phytium/ft2004/ft2004.c
> new file mode 100644
> index 0000000..fd54314
> --- /dev/null
> +++ b/board/phytium/ft2004/ft2004.c
> @@ -0,0 +1,95 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2019
> + * shuyiqi <shuyiqi at phytium.com.cn>
> + * liuhao  <liuhao at phytium.com.cn>
> + */
> +
> +#include <common.h>
> +#include <asm/armv8/mmu.h>
> +#include <asm/system.h>
> +#include <asm/io.h>
> +#include <linux/arm-smccc.h>
> +#include <linux/kernel.h>
> +#include <scsi.h>
> +#include "cpu.h"
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +int dram_init(void)
> +{
> +	gd->mem_clk = 0;
> +	gd->ram_size = PHYS_SDRAM_1_SIZE;
> +	return 0;
> +}
> +
> +int dram_init_banksize(void)
> +{
> +	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> +	gd->bd->bi_dram[0].size =  PHYS_SDRAM_1_SIZE;
> +
> +	return 0;
> +}
> +
> +int board_init(void)
> +{
> +	return 0;
> +}
> +
> +void reset_cpu(ulong addr)
> +{
> +	struct arm_smccc_res res;
> +
> +	arm_smccc_smc(0x84000009, 0, 0, 0, 0, 0, 0, 0, &res);
> +	debug("reset cpu error, %lx\n", res.a0);
> +}
> +
> +static struct mm_region ft2004_mem_map[] = {
> +	{
> +		.virt = 0x0UL,
> +		.phys = 0x0UL,
> +		.size = 0x80000000UL,
> +		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> +				 PTE_BLOCK_NON_SHARE |
> +				 PTE_BLOCK_PXN |
> +				 PTE_BLOCK_UXN
> +	},
> +	{
> +		.virt = (u64)PHYS_SDRAM_1,
> +		.phys = (u64)PHYS_SDRAM_1,
> +		.size = (u64)PHYS_SDRAM_1_SIZE,
> +		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
> +				 PTE_BLOCK_NS |
> +				 PTE_BLOCK_INNER_SHARE
> +	},
> +	{
> +		0,
> +	}
> +};
> +
> +struct mm_region *mem_map = ft2004_mem_map;
> +
> +int print_cpuinfo(void)
> +{
> +	printf("CPU: Phytium ft2004 %ld MHz\n", gd->cpu_clk);
> +	return 0;
> +}
> +
> +int __asm_flush_l3_dcache(void)
> +{
> +	int i, pstate;
> +
> +	for (i = 0; i < HNF_COUNT; i++)
> +		writeq(HNF_PSTATE_SFONLY, HNF_PSTATE_REQ + i * HNF_STRIDE);
> +	for (i = 0; i < HNF_COUNT; i++) {
> +		do {
> +			pstate = readq(HNF_PSTATE_STAT + i * HNF_STRIDE);
> +		} while ((pstate & 0xf) != (HNF_PSTATE_SFONLY << 2));
> +	}
> +
> +	for (i = 0; i < HNF_COUNT; i++)
> +		writeq(HNF_PSTATE_FULL, HNF_PSTATE_REQ + i * HNF_STRIDE);
> +
> +	return 0;
> +}
> +
> diff --git a/configs/ft2004_defconfig b/configs/ft2004_defconfig
> new file mode 100644
> index 0000000..875d529
> --- /dev/null
> +++ b/configs/ft2004_defconfig
> @@ -0,0 +1,23 @@
> +CONFIG_ARM=y
> +CONFIG_ARM_SMCCC=y
> +CONFIG_TARGET_FT2004=y
> +CONFIG_SYS_TEXT_BASE=0x88000000
> +CONFIG_NR_DRAM_BANKS=1
> +# CONFIG_PSCI_RESET is not set
> +CONFIG_AHCI=y
> +# CONFIG_DISPLAY_CPUINFO is not set
> +# CONFIG_DISPLAY_BOARDINFO is not set
> +CONFIG_SYS_PROMPT="ft2004#"
> +# CONFIG_CMD_LZMADEC is not set
> +# CONFIG_CMD_UNZIP is not set
> +CONFIG_CMD_TFTPPUT=y
> +CONFIG_CMD_PING=y
> +CONFIG_OF_CONTROL=y
> +CONFIG_DEFAULT_DEVICE_TREE="phytium-ft2004"
> +CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_DM=y
> +# CONFIG_MMC is not set
> +CONFIG_DM_ETH=y
> +CONFIG_ETH_DESIGNWARE=y
> +CONFIG_DM_SERIAL=y
> +CONFIG_PL01X_SERIAL=y
> diff --git a/include/configs/ft2004.h b/include/configs/ft2004.h
> new file mode 100644
> index 0000000..227d25b
> --- /dev/null
> +++ b/include/configs/ft2004.h
> @@ -0,0 +1,24 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (C) 2019
> + * shuyiqi  <shuyiqi at phytium.com.cn>
> + * liuhao   <liuhao at phytium.com.cn>
> + */
> +
> +#ifndef __FT_2004_CONFIG_H__
> +#define __FT_2004_CONFIG_H__
> +
> +/* Sdram Bank #1 Address */
> +#define PHYS_SDRAM_1			0x80000000
> +#define PHYS_SDRAM_1_SIZE		0x7B000000
> +#define CONFIG_SYS_SDRAM_BASE   PHYS_SDRAM_1
> +
> +#define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_SDRAM_BASE + 0x10000000)
> +
> +/* Size of Malloc Pool */
> +#define CONFIG_ENV_SIZE 4096
> +#define CONFIG_SYS_MALLOC_LEN	(1 * 1024 * 1024  + CONFIG_ENV_SIZE)
> +
> +#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE - 0x100000)
> +
> +#endif




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