[U-Boot] [PATCH] MIPS: add compile time definition of L2 cache size

[Daniel Schwierzeck]

Am 10.06.19 um 20:05 schrieb Ramon Fried:
> If configuration is set to skip low level init, automatic
> probe of L2 cache size is not performed and the size is set to 0.
> Flushing or invalidating the L2 cache will fail in this case.
> 
> Add a static configuration (SYS_DCACHE_LINE_SIZE) with default set to 0.
> 
> Signed-off-by: Ramon Fried <rfried.dev at gmail.com>
> ---
>  arch/mips/Kconfig     | 10 +++++++++-
>  arch/mips/lib/cache.c |  2 +-
>  2 files changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index 5cb9bdf2ee..235bb5b7e6 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -408,9 +408,17 @@ config SYS_ICACHE_LINE_SIZE
>  	help
>  	  The size of L1 Icache lines, if known at compile time.
>  
> +config SYS_SCACHE_LINE_SIZE
> +	int
> +	default 0
> +	help
> +	  The size of L2 cache lines, if known at compile time.
> +
> +
>  config SYS_CACHE_SIZE_AUTO
>  	def_bool y if SYS_DCACHE_SIZE = 0 && SYS_ICACHE_SIZE = 0 && \
> -		SYS_DCACHE_LINE_SIZE = 0 && SYS_ICACHE_LINE_SIZE = 0
> +		SYS_DCACHE_LINE_SIZE = 0 && SYS_ICACHE_LINE_SIZE = 0 && \
> +		SYS_SCACHE_LINE_SIZE = 0
>  	help
>  	  Select this (or let it be auto-selected by not defining any cache
>  	  sizes) in order to allow U-Boot to automatically detect the sizes
> diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
> index d56fd1e0f4..0ddae30f2c 100644
> --- a/arch/mips/lib/cache.c
> +++ b/arch/mips/lib/cache.c
> @@ -87,7 +87,7 @@ static inline unsigned long scache_line_size(void)
>  #ifdef CONFIG_MIPS_L2_CACHE
>  	return gd->arch.l2_line_size;
>  #else
> -	return 0;
> +	return CONFIG_SYS_SCACHE_LINE_SIZE;
>  #endif
>  }
>  
> 

applied to u-boot-mips, thanks.

-- 
- Daniel