[U-Boot] [PATCH 3/8] pci: layerscape: Update API names for layerscape fixup

[Wasim Khan]

Hi Priyanka,

> -----Original Message-----
> From: Priyanka Jain
> Sent: Monday, October 21, 2019 11:13 AM
> To: Wasim Khan <wasim.khan at nxp.com>; Z.q. Hou <zhiqiang.hou at nxp.com>
> Cc: u-boot at lists.denx.de
> Subject: RE: [PATCH 3/8] pci: layerscape: Update API names for layerscape fixup 
> 
> 
> >-----Original Message-----
> >From: Wasim Khan
> >Sent: Friday, October 18, 2019 7:38 PM
> >To: Priyanka Jain <priyanka.jain at nxp.com>
> >Cc: u-boot at lists.denx.de; Wasim Khan <wasim.khan at nxp.com>
> >Subject: [PATCH 3/8] pci: layerscape: Update API names for layerscape
> >fixup
> >
> >Update API names for layerscape fixup.
> Better description woul be suffixing API name with _ls Why you need this
> change?

OK. Will update the description.
We have organized the code into common DT fixup and layerscape/layerscape_gen4 specific fixup.

> >
> >Signed-off-by: Wasim Khan <wasim.khan at nxp.com>
> >---
> > drivers/pci/pcie_layerscape_fixup.c | 22 +++++++++++-----------
> > 1 file changed, 11 insertions(+), 11 deletions(-)
> >
> >diff --git a/drivers/pci/pcie_layerscape_fixup.c
> >b/drivers/pci/pcie_layerscape_fixup.c
> >index 089e031..e0dcd97 100644
> >--- a/drivers/pci/pcie_layerscape_fixup.c
> >+++ b/drivers/pci/pcie_layerscape_fixup.c
> >@@ -1,6 +1,6 @@
> > // SPDX-License-Identifier: GPL-2.0+
> > /*
> >- * Copyright 2017 NXP
> >+ * Copyright 2017, 2019 NXP
> 2017-2019
> >  * Copyright 2014-2015 Freescale Semiconductor, Inc.
> >  * Layerscape PCIe driver
> >  */
> >@@ -69,8 +69,8 @@ static void ls_pcie_lut_set_mapping(struct ls_pcie
> >*pcie, int index, u32 devid,
> >  *      msi-map = <[devid] [phandle-to-msi-ctrl] [stream-id] [count]
> >  *                 [devid] [phandle-to-msi-ctrl] [stream-id] [count]>;
> >  */
> >-static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie *pcie,
> >-				       u32 devid, u32 streamid)
> >+static void fdt_pcie_set_msi_map_entry_ls(void *blob, struct ls_pcie *pcie,
> >+					  u32 devid, u32 streamid)
> > {
> > 	u32 *prop;
> > 	u32 phandle;
> >@@ -122,8 +122,8 @@ static void fdt_pcie_set_msi_map_entry(void *blob,
> >struct ls_pcie *pcie,
> >  *      iommu-map = <[devid] [phandle-to-iommu-ctrl] [stream-id] [count]
> >  *                 [devid] [phandle-to-iommu-ctrl] [stream-id] [count]>;
> >  */
> >-static void fdt_pcie_set_iommu_map_entry(void *blob, struct ls_pcie *pcie,
> >-				       u32 devid, u32 streamid)
> >+static void fdt_pcie_set_iommu_map_entry_ls(void *blob, struct ls_pcie
> *pcie,
> >+					    u32 devid, u32 streamid)
> > {
> > 	u32 *prop;
> > 	u32 iommu_map[4];
> >@@ -175,7 +175,7 @@ static void fdt_pcie_set_iommu_map_entry(void
> >*blob, struct ls_pcie *pcie,
> > 	}
> > }
> >
> >-static void fdt_fixup_pcie(void *blob)
> >+static void fdt_fixup_pcie_ls(void *blob)
> > {
> > 	struct udevice *dev, *bus;
> > 	struct ls_pcie *pcie;
> >@@ -209,11 +209,11 @@ static void fdt_fixup_pcie(void *blob)
> > 		ls_pcie_lut_set_mapping(pcie, index, bdf >> 8,
> > 					streamid);
> > 		/* update msi-map in device tree */
> >-		fdt_pcie_set_msi_map_entry(blob, pcie, bdf >> 8,
> >-					   streamid);
> >+		fdt_pcie_set_msi_map_entry_ls(blob, pcie, bdf >> 8,
> >+					      streamid);
> > 		/* update iommu-map in device tree */
> >-		fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8,
> >-					     streamid);
> >+		fdt_pcie_set_iommu_map_entry_ls(blob, pcie, bdf >> 8,
> >+						streamid);
> > 	}
> > }
> > #endif
> >@@ -279,7 +279,7 @@ void ft_pci_setup(void *blob, bd_t *bd)
> > 		ft_pcie_ls_setup(blob, pcie);
> >
> > #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
> >-	fdt_fixup_pcie(blob);
> >+	fdt_fixup_pcie_ls(blob);
> > #endif
> > }
> >
> >--
> >2.7.4
> 
> --priyankajain