[U-Boot] [PATCH v3 025/108] x86: tpl: Add a fake PCI bus

Andy Shevchenko andy.shevchenko at gmail.com
Tue Oct 22 08:19:10 UTC 2019


On Tue, Oct 22, 2019 at 1:54 AM Simon Glass <sjg at chromium.org> wrote:
> On Mon, 21 Oct 2019 at 01:52, Andy Shevchenko <andy.shevchenko at gmail.com> wrote:
> > On Mon, Oct 21, 2019 at 7:24 AM Simon Glass <sjg at chromium.org> wrote:

> > PCI(e) bus is present in a lot of SoCs (not exclusively x86). Perhaps
> > better idea is to have something like lib/pci.c with minimum support
> > for PCI type 1 and probably PCI type 2 accessors and other very basic
> > functions.
>
> I don't know of any use case for PCI in TPL on other platforms.
>
> x86 is I think unique in that it requires PCI to do anything.

I don't think so. PCI is a core part of the SoC, indeed, though what
exactly do we need from it here? IO accessors to PCI configuration
space?

> For
> other platforms I am familiar with they can boot a fair way without
> it.

Perhaps we may achieve the same here?

> I do want to avoid the premature-optimisation problem, i.e. inventing
> new use cases that no one uses. The only thing we really know right
> now is that we need this for newer x86 platforms.


-- 
With Best Regards,
Andy Shevchenko


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