[U-Boot] [PATCH v2 3/6] arm: dts: k3-j721e-mcu-wakeup: Add HyperBus Controller node

[Stefan Roese]

Hi Vignesh,

On 10.10.19 07:52, Vignesh Raghavendra wrote:
> Add DT node for HyperBus Memory Controller in the FSS. On J721e, its not
> possible to use OSPI0 and HBMC simultaneously as they are muxed within
> the Flash Subsystem hence disable HBMC by default as keep OSPI enabled.
> Bootloader will fixup DT when it detects HyperFlash instead of OSPI.
> 
> Signed-off-by: Vignesh Raghavendra <vigneshr at ti.com>
> ---
>   arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 26 ++++++++++++++++++++++++++
>   1 file changed, 26 insertions(+)
> 
> diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
> index c217866e9a2b..8838771dc1a1 100644
> --- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
> +++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
> @@ -80,4 +80,30 @@
>   		clocks = <&k3_clks 149 0>;
>   		clock-names = "fclk";
>   	};
> +
> +	fss: fss at 47000000 {
> +		compatible = "syscon", "simple-mfd";
> +		reg = <0x0 0x47000000 0x0 0x100>;
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		hbmc_mux: hbmc-mux {
> +			compatible = "mmio-mux";
> +			#mux-control-cells = <1>;
> +			mux-reg-masks = <0x4 0x2>; /* HBMC select */
> +		};
> +
> +		hbmc: hyperbus at 47034000 {
> +			compatible = "ti,j721e-hbmc", "ti,am654-hbmc";
> +			reg = <0x0 0x47034000 0x0 0x100>,
> +				<0x5 0x00000000 0x1 0x0000000>;
> +			power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
> +			#address-cells = <2>;
> +			#size-cells = <1>;
> +			mux-controls = <&hbmc_mux 0>;
> +			assigned-clocks = <&k3_clks 102 0>;
> +			assigned-clock-rates = <166666666>;
> +		};
> +	};
>   };
> 

This patch does not apply any more. Could you please rebase and
resubmit?

Thanks,
Stefan