[U-Boot] [PATCH 3/3] ram: k3-am654: Do not rely on default values for certain DDR register
trini at konsulko.com
Sat Oct 26 00:06:16 UTC 2019
On Mon, Oct 07, 2019 at 02:04:27PM +0530, Lokesh Vutla wrote:
> From: James Doublesin <doublesin at ti.com>
> Added the following registers to the DDR configuration:
> - ACIOCR0,
> - ACIOCR3,
> - V2H_CTL_REG,
> - DX8SLxDQSCTL.
> Modified enable_dqs_pd and disable_dqs_pd to only touch the associated
> bit fields for pullup and pulldown registers (to preserve slew rate and
> other bits in that same register). Also update the dts files in the same
> patch to maintain git bisectability.
> Signed-off-by: James Doublesin <doublesin at ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla at ti.com>
Applied to u-boot/master, thanks!
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