[U-Boot] [PATCH v3 023/108] x86: timer: Allow a timer base of 0

[Bin Meng]

Hi Simon,

On Mon, Oct 21, 2019 at 11:40 AM Simon Glass <sjg at chromium.org> wrote:
>
> On some platforms the timer is reset to 0 when the SoC is reset. Having
> this as the timer base is useful since it provides an indication of how
> long it takes before U-Boot is running.
>
> When U-Boot sets the timer base to something else, time is lost and we
> no-longer have an accurate account of the time since reset. This
> particularly affects bootstage.
>
> Add an option to leave the timer base as 0 on boot.

I think we can change the timer base as 0 for all x86 native port. And
use rdtsc() for configuration when U-Boot is used as payloads, eg:
efi, coreboot, slimbootloader, etc.

>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
> Changes in v3: None
> Changes in v2: None
>
>  drivers/timer/Kconfig     | 13 +++++++++++++
>  drivers/timer/tsc_timer.c |  3 ++-
>  2 files changed, 15 insertions(+), 1 deletion(-)
>

Regards,
Bin