[U-Boot] [PATCH 1/2] Convert CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE to Kconfig

S├ębastien Szymanski sebastien.szymanski at armadeus.com
Fri Sep 6 07:40:46 UTC 2019


This converts the following to Kconfig:

CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE

Signed-off-by: S├ębastien Szymanski <sebastien.szymanski at armadeus.com>
---
 configs/warp7_defconfig      | 1 +
 configs/warp_defconfig       | 1 +
 drivers/mmc/Kconfig          | 6 ++++++
 include/configs/warp.h       | 1 -
 include/configs/warp7.h      | 1 -
 scripts/config_whitelist.txt | 1 -
 6 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig
index a022454976..9a167d2c43 100644
--- a/configs/warp7_defconfig
+++ b/configs/warp7_defconfig
@@ -40,6 +40,7 @@ CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_FSL_USDHC=y
+CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX7=y
 CONFIG_DM_PMIC=y
diff --git a/configs/warp_defconfig b/configs/warp_defconfig
index 7a6ea6f8c6..d719dc779a 100644
--- a/configs/warp_defconfig
+++ b/configs/warp_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_DFU_MMC=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_FSL_USDHC=y
+CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 0ccb1ea701..f61b17b86b 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -701,6 +701,12 @@ config FSL_USDHC
 	help
 	  This enables the Ultra Secured Digital Host Controller enhancements
 
+config SYS_FSL_ESDHC_HAS_DDR_MODE
+	depends on FSL_ESDHC || FSL_ESDHC_IMX
+	bool "Enable Dual Data Rate support"
+	help
+	  This enables Dual Data Rate support (DDR52)
+
 endmenu
 
 config SYS_FSL_ERRATUM_ESDHC111
diff --git a/include/configs/warp.h b/include/configs/warp.h
index 5345f5314d..a00c535b50 100644
--- a/include/configs/warp.h
+++ b/include/configs/warp.h
@@ -22,7 +22,6 @@
 
 /* MMC Configs */
 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR
-#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
 
 /* Watchdog */
 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 30000 /* 30s */
diff --git a/include/configs/warp7.h b/include/configs/warp7.h
index 73541fe176..aa259cd9ef 100644
--- a/include/configs/warp7.h
+++ b/include/configs/warp7.h
@@ -18,7 +18,6 @@
 
 /* MMC Config*/
 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC3_BASE_ADDR
-#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
 #define CONFIG_SYS_MMC_IMG_LOAD_PART	1
 
 /* Switch on SERIAL_TAG */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index b18eab1707..49c041b59e 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -2555,7 +2555,6 @@ CONFIG_SYS_FSL_ERRATUM_A_004934
 CONFIG_SYS_FSL_ESDHC_ADDR
 CONFIG_SYS_FSL_ESDHC_BE
 CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
-CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
 CONFIG_SYS_FSL_ESDHC_LE
 CONFIG_SYS_FSL_ESDHC_NUM
 CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
-- 
2.21.0



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