[U-Boot] [EXT] Re: [PATCH 1/6] spi: fsl_qspi: Fix DDR mode setting for latest iMX platforms
sr at denx.de
Wed Sep 18 07:42:20 UTC 2019
On 18.09.19 09:08, Schrempf Frieder wrote:
>> One further update on this QSPI driver. This driver only works when
>> loaded via "imx_usb" on the i.MX6ULL EVK. When programmed into QSPI
>> and booted from QSPI this driver does not detect the SPI NOR
>> => sf probe
>> unrecognized JEDEC id bytes: ff, ff, ff
>> Do you have any idea what might explain this difference. I would have
>> expected that when booting via QSPI it would be "easier" for the
>> driver, as the BootROM already initializes the QSPI interface. Which
>> is not the case in the boot via serial download (imx_usb) mode. Here
>> everyhting (pinmux, clocks, etc) need to be configured.
>> My feeling is that something is configured "incorrectly" by the
>> BootROM in this case which is not re-configured as the QSPI driver
>> needs it to be currently.
>> Do you have any ideas on what might be the problem here? Is there
>> something that I can do to help test this? Would it help if I would
>> send the debug logging of the driver?
> I have a strong suspicion of what goes wrong in your case. We
> experienced exactly the same issue recently on i.MX6ULL. For some
> reasons (I guess differences in BootROM) this does not happen on i.MX6UL.
> The problem is, that the BootROM sets the TDH bits in the QuadSPI_FLSHCR
> register to '01' in case it uses the DDR mode. Afterwards when U-Boot or
> Linux try to access the flash in SDR mode, they fail as the TDH bits are
> still set. Resetting them to '00' solves the problem.
> Unfortunately the TDH bits are not documented in the manual of the
> i.MX6UL/ULL, but they can be found in the manual of the i.MX7.
> For the QSPI driver, this means it needs a fix to set/reset the TDH bits
> according to the mode that is used (DDR/SDR).
> For more details please also look here:
Perfect. With these bits set to 00 again, booting from QSPI now
works on the EVK. Many thanks for this hint! :)
BTW: When receiving your mail I was just comparing the registers
settings and wondering about this difference in bit 16 as well. ;)
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