[U-Boot] [PATCH v2 38/38] x86: Rename turbo ratio MSR to MSR_TURBO_RATIO_LIMIT

[Simon Glass]

This MSR number is used on most modern Intel processors, so drop the
confusing NHM prefix (which might mean Nehalem).

Signed-off-by: Simon Glass <sjg at chromium.org>
---

Changes in v2:
- Rebase to master

 arch/x86/cpu/broadwell/cpu_full.c | 2 +-
 arch/x86/include/asm/msr-index.h  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c
index bd0b2037fa1..9686cf5e0e7 100644
--- a/arch/x86/cpu/broadwell/cpu_full.c
+++ b/arch/x86/cpu/broadwell/cpu_full.c
@@ -346,7 +346,7 @@ static void set_max_ratio(void)
 
 	/* Check for configurable TDP option */
 	if (turbo_get_state() == TURBO_ENABLED) {
-		msr = msr_read(MSR_NHM_TURBO_RATIO_LIMIT);
+		msr = msr_read(MSR_TURBO_RATIO_LIMIT);
 		perf_ctl.lo = (msr.lo & 0xff) << 8;
 	} else if (cpu_config_tdp_levels()) {
 		/* Set to nominal TDP ratio */
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 1a02d8c8fe5..7cb78beafa1 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -101,7 +101,7 @@
 #define MSR_OFFCORE_RSP_1		0x000001a7
 #define MSR_MISC_PWR_MGMT		0x1aa
 #define  MISC_PWR_MGMT_EIST_HW_DIS	(1 << 0)
-#define MSR_NHM_TURBO_RATIO_LIMIT	0x000001ad
+#define MSR_TURBO_RATIO_LIMIT		0x000001ad
 #define MSR_IVT_TURBO_RATIO_LIMIT	0x000001ae
 
 #define MSR_IA32_ENERGY_PERFORMANCE_BIAS	0x1b0
-- 
2.23.0.444.g18eeb5a265-goog