[U-Boot] [PATCH 068/126] x86: tpl: Add a fake PCI bus

Simon Glass sjg at chromium.org
Wed Sep 25 14:56:52 UTC 2019

In TPL we try to minimise code size so do not include the PCI subsystem.
We can use fixed BARs and drivers can directly program the devices that
they need.

However we do need to bind the devices on the PCI bus and without PCI this
does not ordinarily happen. As a work-around, define a fake PCI bus which
does this binding, but no other PCI operations. This is a convenient way
to ensure that we can use the same device tree for TPL, SPL and U-Boot

   TPL    - CONFIG_TPL_PCI is not set (manual mode, fake PCI bus)
   SPL    - CONFIG_SPL_PCI is set (manual mode but with real PCI bus)
   U-Boot - CONFIG_PCI is set (full auto-config after relocation)

Signed-off-by: Simon Glass <sjg at chromium.org>

 arch/x86/lib/tpl.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c
index d70f590541c..f8075568a2c 100644
--- a/arch/x86/lib/tpl.c
+++ b/arch/x86/lib/tpl.c
@@ -5,6 +5,7 @@
 #include <common.h>
 #include <debug_uart.h>
+#include <dm.h>
 #include <spl.h>
 #include <asm/cpu.h>
 #include <asm/mtrr.h>
@@ -115,3 +116,27 @@ void spl_board_init(void)
+ * This is a fake PCI bus for TPL when it doesn't have proper PCI. It is enough
+ * to bind the devices on the PCI bus, some of which have early-regs properties
+ * providing fixed BARs. Individual drivers program these BARs themselves so
+ * that they can access the devices. The BARs are allocated statically in the
+ * device tree.
+ *
+ * Once SPL is running it enables PCI properly, but does not auto-assign BARs
+ * for devices, so the TPL BARs continue to be used. Once U-Boot starts it does
+ * the autoallocation (after relocation).
+ */
+static const struct udevice_id tpl_fake_pci_ids[] = {
+	{ .compatible = "pci-x86" },
+	{ }
+U_BOOT_DRIVER(pci_x86) = {
+	.name	= "pci_x86",
+	.of_match = tpl_fake_pci_ids,

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