[U-Boot] [PATCH 076/126] x86: Add a uclass for ITSS

[Simon Glass]

This models some sort of interrupt thingy but there are so many
abreviations that I cannot find out what it stands for. It is something
to do with interrupts.

It supports two operations.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

 drivers/misc/Kconfig       |  9 ++++++
 drivers/misc/Makefile      |  1 +
 drivers/misc/itss-uclass.c | 34 +++++++++++++++++++++++
 include/dm/uclass-id.h     |  1 +
 include/itss.h             | 56 ++++++++++++++++++++++++++++++++++++++
 5 files changed, 101 insertions(+)
 create mode 100644 drivers/misc/itss-uclass.c
 create mode 100644 include/itss.h

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 74055a35516..62c9e1089db 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -194,6 +194,15 @@ config FSL_SEC_MON
 	  Security Monitor can be transitioned on any security failures,
 	  like software violations or hardware security violations.
 
+config ITSS
+	bool "Intel ITSS Interrupt controller"
+	depends on X86 || SANDBOX
+	help
+	  This enabled support for the Intel ITSS, a type of interrupt
+	  controller. It is present on apollolake and some other SoCs. The
+	  device has its own uclass since there are several operations
+	  involved.
+
 config JZ4780_EFUSE
 	bool "Ingenic JZ4780 eFUSE support"
 	depends on ARCH_JZ47XX
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 90ef92806b9..f715d6d6df5 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_GDSYS_SOC) += gdsys_soc.o
 obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
 obj-$(CONFIG_IHS_FPGA) += ihs_fpga.o
 obj-$(CONFIG_IMX8) += imx8/
+obj-$(CONFIG_ITSS) += itss-uclass.o
 obj-$(CONFIG_LED_STATUS) += status_led.o
 obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
 obj-$(CONFIG_MPC83XX_SERDES) += mpc83xx_serdes.o
diff --git a/drivers/misc/itss-uclass.c b/drivers/misc/itss-uclass.c
new file mode 100644
index 00000000000..664865cec3f
--- /dev/null
+++ b/drivers/misc/itss-uclass.c
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * ITSS is a type of interrupt controller used on recent Intel SoC.
+ *
+ * Copyright 2019 Google LLC
+ */
+
+#include <dm.h>
+#include <itss.h>
+
+int itss_route_pmc_gpio_gpe(struct udevice *dev, uint pmc_gpe_num)
+{
+	const struct itss_ops *ops = itss_get_ops(dev);
+
+	if (!ops->route_pmc_gpio_gpe)
+		return -ENOSYS;
+
+	return ops->route_pmc_gpio_gpe(dev, pmc_gpe_num);
+}
+
+int itss_set_irq_polarity(struct udevice *dev, uint irq, bool active_low)
+{
+	const struct itss_ops *ops = itss_get_ops(dev);
+
+	if (!ops->set_irq_polarity)
+		return -ENOSYS;
+
+	return ops->set_irq_polarity(dev, irq, active_low);
+}
+
+UCLASS_DRIVER(itss) = {
+	.id		= UCLASS_ITSS,
+	.name		= "itss",
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 496570ff47d..892c746940d 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -54,6 +54,7 @@ enum uclass_id {
 	UCLASS_I2S,		/* I2S bus */
 	UCLASS_IDE,		/* IDE device */
 	UCLASS_IRQ,		/* Interrupt controller */
+	UCLASS_ITSS,		/* Intel interrupt thingy */
 	UCLASS_KEYBOARD,	/* Keyboard input device */
 	UCLASS_LED,		/* Light-emitting diode (LED) */
 	UCLASS_LPC,		/* x86 'low pin count' interface */
diff --git a/include/itss.h b/include/itss.h
new file mode 100644
index 00000000000..1a282cbac56
--- /dev/null
+++ b/include/itss.h
@@ -0,0 +1,56 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * ITSS is a type of interrupt controller used on recent Intel SoC.
+ *
+ * Copyright 2019 Google LLC
+ */
+
+#ifndef __ITSS_H
+#define __ITSS_H
+
+/**
+ * struct itss_ops - Operations for the ITSS
+ */
+struct itss_ops {
+	/**
+	 * route_pmc_gpio_gpe() - Get the GPIO for an event
+	 *
+	 * @dev: ITSS device
+	 * @pmc_gpe_num: Event number to check
+	 * @returns GPIO for the event, or -ENOENT if none
+	 */
+	int (*route_pmc_gpio_gpe)(struct udevice *dev, uint pmc_gpe_num);
+
+	/**
+	 * set_irq_polarity() - Set the IRQ polarity
+	 *
+	 * @dev: ITSS device
+	 * @irq: Interrupt number to set
+	 * @active_low: true if active low, false for active high
+	 * @return 0 if OK, -EINVAL if @irq is invalid
+	 */
+	int (*set_irq_polarity)(struct udevice *dev, uint irq, bool active_low);
+};
+
+#define itss_get_ops(dev)	((struct itss_ops *)(dev)->driver->ops)
+
+/**
+ * itss_route_pmc_gpio_gpe() - Get the GPIO for an event
+ *
+ * @dev: ITSS device
+ * @pmc_gpe_num: Event number to check
+ * @returns GPIO for the event, or -ENOENT if none
+ */
+int itss_route_pmc_gpio_gpe(struct udevice *dev, uint pmc_gpe_num);
+
+/**
+ * set_irq_polarity() - Set the IRQ polarity
+ *
+ * @dev: ITSS device
+ * @irq: Interrupt number to set
+ * @active_low: true if active low, false for active high
+ * @return 0 if OK, -EINVAL if @irq is invalid
+ */
+int itss_set_irq_polarity(struct udevice *dev, uint irq, bool active_low);
+
+#endif
-- 
2.23.0.444.g18eeb5a265-goog