[U-Boot] [PATCH 102/126] x86: Update .dtsi file for FSP2

Simon Glass sjg at chromium.org
Wed Sep 25 15:00:28 UTC 2019


Include the IFWI section and the FSP-M binary. The FSP-T binary is not
currently used, as CAR is set up manually.

Also drop the FSP binary as this relates only to FSP1.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

 arch/x86/dts/u-boot.dtsi | 29 ++++++++++++++++++++++++++++-
 1 file changed, 28 insertions(+), 1 deletion(-)

diff --git a/arch/x86/dts/u-boot.dtsi b/arch/x86/dts/u-boot.dtsi
index 35129d0510b..189be2196cb 100644
--- a/arch/x86/dts/u-boot.dtsi
+++ b/arch/x86/dts/u-boot.dtsi
@@ -104,12 +104,39 @@
 		offset = <CONFIG_X86_MRC_ADDR>;
 	};
 #endif
-#ifdef CONFIG_HAVE_FSP
+#ifdef CONFIG_FSP_VERSION1
 	intel-fsp {
 		filename = CONFIG_FSP_FILE;
 		offset = <CONFIG_FSP_ADDR>;
 	};
 #endif
+#ifdef CONFIG_FSP_VERSION2
+	intel-descriptor {
+		filename = CONFIG_FLASH_DESCRIPTOR_FILE;
+	};
+	intel-ifwi {
+		filename = CONFIG_IFWI_INPUT_FILE;
+		convert-fit;
+
+		section {
+			size = <0x8000>;
+			ifwi-replace;
+			ifwi-subpart = "IBBP";
+			ifwi-entry = "IBBL";
+			u-boot-tpl {
+			};
+			x86-start16-tpl {
+				offset = <0x7800>;
+			};
+			x86-reset16-tpl {
+				offset = <0x7ff0>;
+			};
+		};
+	};
+	intel-fsp-m {
+		filename = CONFIG_FSP_FILE_M;
+	};
+#endif
 #ifdef CONFIG_HAVE_CMC
 	intel-cmc {
 		filename = CONFIG_CMC_FILE;
-- 
2.23.0.444.g18eeb5a265-goog



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