[U-Boot] [PATCH 5/5] sifive: fu540: Enable spi-nor flash support
Bin Meng
bmeng.cn at gmail.com
Mon Sep 30 10:05:06 UTC 2019
On Sun, Sep 29, 2019 at 3:43 PM Jagan Teki <jagan at amarulasolutions.com> wrote:
>
> HiFive Unleashed A00 has internal is25wp256 spi-nor flash,
What does "internal" mean? The flash is mounted "externally" to the FU540 SoC.
> so enable the same. added test result log for future reference.
>
> Tested on Sifive fuse540 board.
SiFive FU540
>
> Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
> ---
> .../dts/hifive-unleashed-a00-u-boot.dtsi | 1 +
> board/sifive/fu540/Kconfig | 3 +++
> doc/board/sifive/fu540.rst | 19 +++++++++++++++++++
> 3 files changed, 23 insertions(+)
>
> diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
> index 25ec8265a5..d7a64134db 100644
> --- a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
> +++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
> @@ -5,6 +5,7 @@
>
> / {
> aliases {
> + spi0 = &qspi0;
> spi2 = &qspi2;
> };
> };
> diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig
> index 5d65080429..c5a1bca03c 100644
> --- a/board/sifive/fu540/Kconfig
> +++ b/board/sifive/fu540/Kconfig
> @@ -26,6 +26,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
> imply CMD_FS_GENERIC
> imply CMD_NET
> imply CMD_PING
> + imply CMD_SF
> imply CLK_SIFIVE
> imply CLK_SIFIVE_FU540_PRCI
> imply DOS_PARTITION
> @@ -40,6 +41,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
> imply SIFIVE_SERIAL
> imply SPI
> imply SPI_SIFIVE
> + imply SPI_FLASH
> + imply SPI_FLASH_ISSI
> imply MMC
> imply MMC_SPI
> imply MMC_BROKEN_CD
> diff --git a/doc/board/sifive/fu540.rst b/doc/board/sifive/fu540.rst
> index 91b94ee06f..2e70cad02e 100644
> --- a/doc/board/sifive/fu540.rst
> +++ b/doc/board/sifive/fu540.rst
> @@ -366,3 +366,22 @@ load uImage.
>
> Please press Enter to activate this console.
> / #
> +
> +Sample spi nor flash test
> +-------------------------
> +
> +.. code-block:: none
> +
> + => sf probe 0:2
Why cs 2? The flash is definitely on cs 0.
You may find my patch series useful to solve this issue of the cs number.
http://patchwork.ozlabs.org/project/uboot/list/?series=129736
> + SF: Detected is25wp256 with page size 256 Bytes, erase size 4 KiB, total 32 MiB
> + => sf erase 0x1000000 0x100000
> + SF: 1048576 bytes @ 0x1000000 Erased: OK
> + => mw.b 0xc0000000 0xaa 0x100000
> + => sf write 0xc0000000 0x1000000 0x100000
> + device 0 offset 0x1000000, size 0x100000
> + SF: 1048576 bytes @ 0x1000000 Written: OK
> + => sf read 0xf0000000 0x1000000 0x100000
> + device 0 offset 0x1000000, size 0x100000
> + SF: 1048576 bytes @ 0x1000000 Read: OK
> + => cmp.b 0xf0000000 0xc0000000 0x100000
> + Total of 1048576 byte(s) were the same
> --
With the above fixed,
Reviewed-by: Bin Meng <bmeng.cn at gmail.com>
Tested-by: Bin Meng <bmeng.cn at gmail.com>
Regards,
Bin
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