[PATCH V3] ARM: dts: stm32: Add KS8851-16MLL ethernet on FMC2

[Patrick DELAUNAY]

Hi Marek,

> From: Marek Vasut <marex at denx.de>
> Sent: jeudi 26 mars 2020 16:58
> 
> Add DT entries, Kconfig entries and board-specific entries to configure
> FMC2 bus and make KS8851-16MLL on that bus accessible to U-Boot.
>
> Signed-off-by: Marek Vasut <marex at denx.de>
> Cc: Patrick Delaunay <patrick.delaunay at st.com>
> Cc: Patrice Chotard <patrice.chotard at st.com>
> ---
> V2: Configure FMC2 nCS4 for SRAM as well
> V3: Adjust the register macros
> ---
>  arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 68 ++++++++++++++++++++++
>  board/dhelectronics/dh_stm32mp1/board.c    | 28 +++++++++
>  configs/stm32mp15_dhcom_basic_defconfig    |  1 +
>  3 files changed, 97 insertions(+)
> 
> diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
> b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
> index 6c952a57ee..eba3588540 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
> +++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
> @@ -37,6 +37,12 @@
>  			default-state = "on";
>  		};
>  	};
> +
> +	/* This is actually on FMC2, but we do not have bus driver for that */
> +	ksz8851: ks8851mll at 64000000 {
> +		compatible = "micrel,ks8851-mll";
> +		reg = <0x64000000 0x20000>;
> +	};
>  };
> 
>  &i2c4 {
> @@ -50,6 +56,68 @@
>  	};
>  };
> 
> +&pinctrl {
> +	/* These should bound to FMC2 bus driver, but we do not have one */

As temporarily solution (waiting final solution and real FMC2 bus driver) 
can you define a NO_OP in board device associated to existing compatible
= "st,stm32mp15-fmc2"


> +	pinctrl-0 = <&fmc_pins_b>;
> +	pinctrl-1 = <&fmc_sleep_pins_b>;
> +	pinctrl-names = "default", "sleep";
> +
> +	fmc_pins_b: fmc-0 {
> +		pins1 {
[...]
> +		};
> +	};
> +
> +	fmc_sleep_pins_b: fmc-sleep-0 {
> +		pins {
[...]
> +		};
> +	};
> +};
> +
>  &pmic {
>  	u-boot,dm-pre-reloc;
>  };

For example

&fmc {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <& fmc_pins_b>;
	pinctrl-1 = <& fmc_sleep_pins_b>;
	status = "okay";
	#address-cells = <1>;
	#size-cells = <0>;
};

static const struct udevice_id stm32_fmc2_bus_ids[] = {
	{.compatible = "st,stm32mp15-fmc2},
	{ }
};

U_BOOT_DRIVER(stm32_fmc2_bus) = {
	.name		= "stm32mp15-fmc2-ids",
	.id		= UCLASS_NOP,
	.of_match	= stm32_fmc2_bus_ids,
	.bind		= stm32_fmc2_bus,
};

> diff --git a/board/dhelectronics/dh_stm32mp1/board.c
> b/board/dhelectronics/dh_stm32mp1/board.c
> index b663696983..be55242799 100644
> --- a/board/dhelectronics/dh_stm32mp1/board.c
> +++ b/board/dhelectronics/dh_stm32mp1/board.c
> @@ -376,6 +376,32 @@ static void sysconf_init(void)  #endif  }
> 
> +static void board_init_fmc2(void)
> +{

Can you use device-tree information (to avoid hardcoded address STM32_FMC2_BASE).

For me, the address should be used only when the information are
not available in device tree or before the device tree availability (in pre-reloc phasis)

ofnode = ofnode_by_compatible(ofnode_null(), "st,stm32mp15-fmc2");
fmc2_addr = ofnode_get_addr(node);

or use NOP device as proposed previously.

PS: it is a preliminary step/temporarily solution, waiting FMC2 the bus driver availability.

> +#define STM32_FMC2_BCR1		0x0
> +#define STM32_FMC2_BTR1		0x4
> +#define STM32_FMC2_BWTR1	0x104
> +#define STM32_FMC2_BCR(x)	((x) * 0x8 + STM32_FMC2_BCR1)
> +#define STM32_FMC2_BTR(x)	((x) * 0x8 + STM32_FMC2_BTR1)
> +#define STM32_FMC2_BWTR(x)	((x) * 0x8 + STM32_FMC2_BWTR1)
> +
> +#define RCC_MP_AHB6RSTCLRR	0x218
> +#define RCC_MP_AHB6ENSETR	0x19c
> +
> +	/* Set up FMC2 bus for KS8851-16MLL and X11 SRAM */
> +	writel(BIT(12), STM32_RCC_BASE + RCC_MP_AHB6RSTCLRR);
> +	writel(BIT(12), STM32_RCC_BASE + RCC_MP_AHB6ENSETR);

Use clk and reset driver model and DT, for example:

struct clk clk;
struct reset_ctl reset;

clk_get_by_index_nodev(ofnode, 0, &clk ;
clk_get_by_index_nodev(ofnode, 0,  &reset);


> +	/* KS8851-16MLL */
> +	writel(0x000010db, STM32_FMC2_BASE + STM32_FMC2_BCR(1));
> +	writel(0xc0022222, STM32_FMC2_BASE + STM32_FMC2_BTR(1));
> +	/* AS7C34098 SRAM on X11 */
> +	writel(0x000010db, STM32_FMC2_BASE + STM32_FMC2_BCR(3));
> +	writel(0xc0022222, STM32_FMC2_BASE + STM32_FMC2_BTR(3));
> +
> +	setbits_le32(STM32_FMC2_BASE + STM32_FMC2_BCR1, BIT(31)); }
> +
>  /* board dependent setup after realloc */  int board_init(void)  { @@ -399,6 +425,8
> @@ int board_init(void)
> 
>  	sysconf_init();
> 
> +	board_init_fmc2();
> +
>  	if (CONFIG_IS_ENABLED(CONFIG_LED))
>  		led_default_state();
> 
> diff --git a/configs/stm32mp15_dhcom_basic_defconfig
> b/configs/stm32mp15_dhcom_basic_defconfig
> index 921dea242a..683f15e7d5 100644
> --- a/configs/stm32mp15_dhcom_basic_defconfig
> +++ b/configs/stm32mp15_dhcom_basic_defconfig
> @@ -93,6 +93,7 @@ CONFIG_SPI_FLASH_MTD=y
> CONFIG_SPL_SPI_FLASH_MTD=y  CONFIG_DM_ETH=y
> CONFIG_DWC_ETH_QOS=y
> +CONFIG_KS8851_MLL=y
>  CONFIG_PHY=y
>  CONFIG_PHY_STM32_USBPHYC=y
>  CONFIG_PINCONF=y
> --
> 2.25.1

Regards

Patrick