[PATCH v2 u-boot-marvell 1/4] arm: mvebu: turris_mox: Fix early SPI communication

[Stefan Roese]

On 03.04.20 17:24, Marek Behún wrote:
> The SPI clock signal changes value when the SPI configuration register
> is configured. This can sometimes lead to the device misinterpreting
> the enablement of the SPI controller as actual clock tick.
> This can be solved by first setting the SPI CS1 pin from GPIO to SPI mode,
> and only after that writing the SPI configuration register.
> 
> Signed-off-by: Marek Behún <marek.behun at nic.cz>
> ---

The patch revision history is missing. Please make sure to add it next
time you sent updated patches.

Other that that:

Reviewed-by: Stefan Roese <sr at denx.de>

Thanks,
Stefan

>   board/CZ.NIC/turris_mox/turris_mox.c | 9 ++++++---
>   1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c
> index 377191baef..0b13d1d190 100644
> --- a/board/CZ.NIC/turris_mox/turris_mox.c
> +++ b/board/CZ.NIC/turris_mox/turris_mox.c
> @@ -67,9 +67,11 @@ int board_fix_fdt(void *blob)
>   	 * to read SPI by reading/writing SPI registers directly
>   	 */
>   
> -	writel(0x563fa, ARMADA_37XX_NB_GPIO_SEL);
>   	writel(0x10df, ARMADA_37XX_SPI_CFG);
> -	writel(0x2005b, ARMADA_37XX_SPI_CTRL);
> +	/* put pin from GPIO to SPI mode */
> +	clrbits_le32(ARMADA_37XX_NB_GPIO_SEL, BIT(12));
> +	/* enable SPI CS1 */
> +	setbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));
>   
>   	while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
>   		udelay(1);
> @@ -89,7 +91,8 @@ int board_fix_fdt(void *blob)
>   
>   	size = i;
>   
> -	writel(0x5b, ARMADA_37XX_SPI_CTRL);
> +	/* disable SPI CS1 */
> +	clrbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));
>   
>   	if (size > 1 && (topology[1] == MOX_MODULE_PCI ||
>   			 topology[1] == MOX_MODULE_USB3 ||
> 


Viele Grüße,
Stefan

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