[PATCH] serial: zynq: Change uart initialization logic

[Michal Simek]

út 24. 3. 2020 v 12:24 odesílatel Michal Simek <michal.simek at xilinx.com> napsal:
>
> The commit a673025535ae ("serial: zynq: Initialize uart only before
> relocation") introduced code which detects relocation which is working for
> single uart instance. With multiple instances in place there is a need to
> enable and setup every instance. That's why detect if TX is enabled. If it
> is then don't initialize uart again.
> In post probe setbrg is called to setup baudrate but values should be the
> same.
>
> As a side effect of this change is that DECLARE_GLOBAL_DATA_PTR can be
> removed completely.
>
> Signed-off-by: Michal Simek <michal.simek at xilinx.com>
> ---
>
>  drivers/serial/serial_zynq.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c
> index e4e4c3928582..0dd6cec82a65 100644
> --- a/drivers/serial/serial_zynq.c
> +++ b/drivers/serial/serial_zynq.c
> @@ -17,8 +17,6 @@
>  #include <serial.h>
>  #include <linux/err.h>
>
> -DECLARE_GLOBAL_DATA_PTR;
> -
>  #define ZYNQ_UART_SR_TXACTIVE  BIT(11) /* TX active */
>  #define ZYNQ_UART_SR_TXFULL    BIT(4) /* TX FIFO full */
>  #define ZYNQ_UART_SR_RXEMPTY   BIT(1) /* RX FIFO empty */
> @@ -45,7 +43,7 @@ struct zynq_uart_platdata {
>         struct uart_zynq *regs;
>  };
>
> -/* Set up the baud rate in gd struct */
> +/* Set up the baud rate */
>  static void _uart_zynq_serial_setbrg(struct uart_zynq *regs,
>                                      unsigned long clock, unsigned long baud)
>  {
> @@ -140,9 +138,12 @@ static int zynq_serial_setbrg(struct udevice *dev, int baudrate)
>  static int zynq_serial_probe(struct udevice *dev)
>  {
>         struct zynq_uart_platdata *platdata = dev_get_platdata(dev);
> +       struct uart_zynq *regs = platdata->regs;
> +       u32 val;
>
> -       /* No need to reinitialize the UART after relocation */
> -       if (gd->flags & GD_FLG_RELOC)
> +       /* No need to reinitialize the UART if TX already enabled */
> +       val = readl(&regs->control);
> +       if (val & ZYNQ_UART_CR_TX_EN)
>                 return 0;
>
>         _uart_zynq_serial_init(platdata->regs);
> --
> 2.25.1
>

Applied.
M

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs