[PATCH] mmc: zynq: parse dt when probing

[Michal Simek]

Hi,

On 06. 04. 20 16:35, Benedikt Grassl wrote:
> Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes
> is not evaluated. This results in the bus width staying at its default
> value (4 bit in HS200 mode).
> Fix this by parsing the device tree while probing.
> 
> Signed-off-by: Benedikt Grassl <Benedikt.Grassl at rohde-schwarz.com>
> ---
>  drivers/mmc/zynq_sdhci.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
> index da3ff53da1..f076f5f73d 100644
> --- a/drivers/mmc/zynq_sdhci.c
> +++ b/drivers/mmc/zynq_sdhci.c
> @@ -251,6 +251,11 @@ static int arasan_sdhci_probe(struct udevice *dev)
>  			      CONFIG_ZYNQ_SDHCI_MIN_FREQ);
>  	if (ret)
>  		return ret;
> +
> +	ret = mmc_of_parse(dev, &plat->cfg);
> +	if (ret)
> +		return ret;
> +
>  	upriv->mmc = host->mmc;
>  
>  	return sdhci_probe(dev);
> 

Interesting that it wasn't spot before. Anyway I have checked
mmc_of_parse() and it looks like that we need to change other stuff in
this driver too.
The first thing is to remove max-frequency and no-1-8-v reading in
arasan_sdhci_ofdata_to_platdata() because it is not needed. Also remove
that no_1p8/f_max properties from private data structure.

Setup cfg->f_max = CONFIG_ZYNQ_SDHCI_MAX_FREQ; before mmc_of_parse is
called.

And also revisit the whole:
b8e25ef16a58 ("mmc: sdhci: Read capabilities register1 and update host
caps") which maybe can be also reverted.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs


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