[PATCH v6 07/17] sifive: dts: fu540: Add DDR controller and phy register settings

[Pragnesh Patel]

Hi Jagan,

>-----Original Message-----
>From: Jagan Teki <jagan at amarulasolutions.com>
>Sent: 07 April 2020 01:00
>To: Pragnesh Patel <pragnesh.patel at sifive.com>
>Cc: U-Boot-Denx <u-boot at lists.denx.de>; Atish Patra
><atish.patra at wdc.com>; palmerdabbelt at google.com; Bin Meng
><bmeng.cn at gmail.com>; Paul Walmsley <paul.walmsley at sifive.com>; Troy
>Benjegerdes <troy.benjegerdes at sifive.com>; Anup Patel
><anup.patel at wdc.com>; Sagar Kadam <sagar.kadam at sifive.com>; Rick Chen
><rick at andestech.com>
>Subject: Re: [PATCH v6 07/17] sifive: dts: fu540: Add DDR controller and phy
>register settings
>
>[External Email] Do not click links or attachments unless you recognize the
>sender and know the content is safe
>
>On Sun, Mar 29, 2020 at 10:36 PM Pragnesh Patel
><pragnesh.patel at sifive.com> wrote:
>>
>> Add DDR controller and phy register settings, taken from fsbl
>> (https://github.com/sifive/freedom-u540-c000-bootloader.git)
>>
>> Signed-off-by: Pragnesh Patel <pragnesh.patel at sifive.com>
>> ---
>>  arch/riscv/dts/fu540-c000-u-boot.dtsi         |    7 +
>
>separate patch
>
>>  ...fu540-hifive-unleashed-a00-sdram-ddr4.dtsi | 1489
>> +++++++++++++++++
>
>separate patch
>
>>  .../dts/hifive-unleashed-a00-u-boot.dtsi      |    1 +
>
>squash with SPL support patch.

Will update all in v7.

>
>Jagan.