[PATCH v2 5/5] azure/gitlab/travis: Add RISC-V SPL testing

Tom Rini trini at konsulko.com
Sat Apr 11 03:16:59 CEST 2020

On Sat, Mar 28, 2020 at 07:25:29AM -0700, Bin Meng wrote:

> This adds QEMU RISC-V 32/64 SPL testing. Unlike QEMU RISC-V 32/64,
> we test SPL running in M-mode and U-Boot proper running in S-mode,
> with a 4-core SMP configuration.
> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>

Applied to u-boot/next, thanks!

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