[PATCH v1 u-boot-marvell 1/5] arm64: mvebu: armada-8k: move dram init code

[Stefan Roese]

On 08.04.20 19:25, Marek Behún wrote:
> Move Armada-8k specific DRAM init code into armada-8k specific
> directory.
> 
> Signed-off-by: Marek Behún <marek.behun at nic.cz>

Reviewed-by: Stefan Roese <sr at denx.de>

Thanks,
Stefan

> ---
>   arch/arm/mach-mvebu/arm64-common.c     | 46 +----------------------
>   arch/arm/mach-mvebu/armada8k/Makefile  |  3 +-
>   arch/arm/mach-mvebu/armada8k/dram.c    | 52 ++++++++++++++++++++++++++
>   arch/arm/mach-mvebu/include/mach/cpu.h |  4 ++
>   4 files changed, 59 insertions(+), 46 deletions(-)
>   create mode 100644 arch/arm/mach-mvebu/armada8k/dram.c
> 
> diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c
> index 40b98dbf08..244ea49d8a 100644
> --- a/arch/arm/mach-mvebu/arm64-common.c
> +++ b/arch/arm/mach-mvebu/arm64-common.c
> @@ -45,54 +45,12 @@ const struct mbus_dram_target_info *mvebu_mbus_dram_info(void)
>   	return NULL;
>   }
>   
> -/* DRAM init code ... */
> -
> -#define MV_SIP_DRAM_SIZE	0x82000010
> -
> -static u64 a8k_dram_scan_ap_sz(void)
> -{
> -	struct pt_regs pregs;
> -
> -	pregs.regs[0] = MV_SIP_DRAM_SIZE;
> -	pregs.regs[1] = SOC_REGS_PHY_BASE;
> -	smc_call(&pregs);
> -
> -	return pregs.regs[0];
> -}
> -
> -static void a8k_dram_init_banksize(void)
> -{
> -	/*
> -	 * The firmware (ATF) leaves a 1G whole above the 3G mark for IO
> -	 * devices. Higher RAM is mapped at 4G.
> -	 *
> -	 * Config 2 DRAM banks:
> -	 * Bank 0 - max size 4G - 1G
> -	 * Bank 1 - ram size - 4G + 1G
> -	 */
> -	phys_size_t max_bank0_size = SZ_4G - SZ_1G;
> -
> -	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
> -	if (gd->ram_size <= max_bank0_size) {
> -		gd->bd->bi_dram[0].size = gd->ram_size;
> -		return;
> -	}
> -
> -	gd->bd->bi_dram[0].size = max_bank0_size;
> -	if (CONFIG_NR_DRAM_BANKS > 1) {
> -		gd->bd->bi_dram[1].start = SZ_4G;
> -		gd->bd->bi_dram[1].size = gd->ram_size - max_bank0_size;
> -	}
> -}
> -
>   __weak int dram_init_banksize(void)
>   {
>   	if (CONFIG_IS_ENABLED(ARMADA_8K))
> -		a8k_dram_init_banksize();
> +		return a8k_dram_init_banksize();
>   	else
> -		fdtdec_setup_memory_banksize();
> -
> -	return 0;
> +		return fdtdec_setup_memory_banksize();
>   }
>   
>   __weak int dram_init(void)
> diff --git a/arch/arm/mach-mvebu/armada8k/Makefile b/arch/arm/mach-mvebu/armada8k/Makefile
> index 82cb25b417..0a4756717a 100644
> --- a/arch/arm/mach-mvebu/armada8k/Makefile
> +++ b/arch/arm/mach-mvebu/armada8k/Makefile
> @@ -2,5 +2,4 @@
>   #
>   # Copyright (C) 2016 Stefan Roese <sr at denx.de>
>   
> -obj-y = cpu.o
> -obj-y += cache_llc.o
> +obj-y = cpu.o cache_llc.o dram.o
> diff --git a/arch/arm/mach-mvebu/armada8k/dram.c b/arch/arm/mach-mvebu/armada8k/dram.c
> new file mode 100644
> index 0000000000..265a8b0ae8
> --- /dev/null
> +++ b/arch/arm/mach-mvebu/armada8k/dram.c
> @@ -0,0 +1,52 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2016 Stefan Roese <sr at denx.de>
> + */
> +
> +#include <common.h>
> +#include <asm/arch/cpu.h>
> +#include <asm/arch/soc.h>
> +#include <asm/system.h>
> +#include <linux/sizes.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define MV_SIP_DRAM_SIZE	0x82000010
> +
> +u64 a8k_dram_scan_ap_sz(void)
> +{
> +	struct pt_regs pregs;
> +
> +	pregs.regs[0] = MV_SIP_DRAM_SIZE;
> +	pregs.regs[1] = SOC_REGS_PHY_BASE;
> +	smc_call(&pregs);
> +
> +	return pregs.regs[0];
> +}
> +
> +int a8k_dram_init_banksize(void)
> +{
> +	/*
> +	 * The firmware (ATF) leaves a 1G whole above the 3G mark for IO
> +	 * devices. Higher RAM is mapped at 4G.
> +	 *
> +	 * Config 2 DRAM banks:
> +	 * Bank 0 - max size 4G - 1G
> +	 * Bank 1 - ram size - 4G + 1G
> +	 */
> +	phys_size_t max_bank0_size = SZ_4G - SZ_1G;
> +
> +	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
> +	if (gd->ram_size <= max_bank0_size) {
> +		gd->bd->bi_dram[0].size = gd->ram_size;
> +		return 0;
> +	}
> +
> +	gd->bd->bi_dram[0].size = max_bank0_size;
> +	if (CONFIG_NR_DRAM_BANKS > 1) {
> +		gd->bd->bi_dram[1].start = SZ_4G;
> +		gd->bd->bi_dram[1].size = gd->ram_size - max_bank0_size;
> +	}
> +
> +	return 0;
> +}
> diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h
> index 2e2d72aac8..7af8e5d09f 100644
> --- a/arch/arm/mach-mvebu/include/mach/cpu.h
> +++ b/arch/arm/mach-mvebu/include/mach/cpu.h
> @@ -170,6 +170,10 @@ void mv_avs_init(void);
>   static inline void mv_avs_init(void) {}
>   #endif
>   
> +/* A8K dram functions */
> +u64 a8k_dram_scan_ap_sz(void);
> +int a8k_dram_init_banksize(void);
> +
>   /*
>    * get_ref_clk
>    *
> 


Viele Grüße,
Stefan

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