[PATCH] rockchip: rk3399: enable spl-fifo-mode for sdmmc

[Philipp Tomsich]

> On 15.04.2020, at 05:25, Deepak Das <deepakdas.linux at gmail.com> wrote:
> 
> adapting commit fa2047c47310 ("rockchip: rk3328: enable spl-fifo-mode
> for emmc and sdmmc") for rk3399.
> Since mmc to sram can't do dma, add patch to prevent aborts transferring
> TF-A parts.
> 
> Signed-off-by: Deepak Das <deepakdas.linux at gmail.com>
> ---
> arch/arm/dts/rk3399-u-boot.dtsi | 3 +++
> 1 file changed, 3 insertions(+)
> 
> diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
> index 8b857ccfc7..3ad824450e 100644
> --- a/arch/arm/dts/rk3399-u-boot.dtsi
> +++ b/arch/arm/dts/rk3399-u-boot.dtsi
> @@ -84,6 +84,9 @@
> 
> &sdmmc {
> 	u-boot,dm-pre-reloc;
> +
> +	/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
> +	u-boot,spl-fifo-mode;

Most transfers in SPL mode will occur to RAM (i.e. most of TF-A and the full U-Boot),
so this is a heavy-handed solution for a problem affecting only some transfers.

Can’t this be solved using bounce buffers?
You will need to check if the target address cross the inaccessible memory regions
and—if and only if—send these payloads through a bounce buffer... 

> };
> 
> &spi1 {
> -- 
> 2.17.1
>