[PATCH] arm: socfpga: stratix10: Fix incorrect CLKMGR_S10_PERPLL_BYPASS offset
Ley Foon Tan
ley.foon.tan at intel.com
Mon Apr 20 10:17:27 CEST 2020
Offset value for CLKMGR_S10_PERPLL_BYPASS should be 0xb0, fix it.
Reported-by: Chee Hong Ang <chee.hong.ang at intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan at intel.com>
---
arch/arm/mach-socfpga/include/mach/clock_manager_s10.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h
index e710aa2f94f0..9d2b3bababe2 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h
@@ -85,7 +85,7 @@ void cm_basic_init(const struct cm_config * const cfg);
#define CLKMGR_S10_MAINPLL_VCOCALIB 0x8c
/* Periphpll group */
#define CLKMGR_S10_PERPLL_EN 0xa4
-#define CLKMGR_S10_PERPLL_BYPASS 0xac
+#define CLKMGR_S10_PERPLL_BYPASS 0xb0
#define CLKMGR_S10_PERPLL_CNTR2CLK 0xbc
#define CLKMGR_S10_PERPLL_CNTR3CLK 0xc0
#define CLKMGR_S10_PERPLL_CNTR4CLK 0xc4
--
2.19.0
More information about the U-Boot
mailing list