[PATCH 0/3] spi: Support SPI I/O protocol lines

[Vignesh Raghavendra]

Hi Jagan,

On 20/04/20 5:39 pm, Jagan Teki wrote:
> Some of the SPI controllers have a special set of format
> registers that defines how the transfer initiated to the
> FIFO by means of I/O protocol lines.
>   
> Each mode of transfer from slave would be required to configure
> the I/O protocol lines so-that the master would identify how
> many number I/O protocol lines were used and alter the protocol
> bits on the controller.
> 
> To address this issue (on these kinds of SPI controllers) this
> series is trying to send the I/O protocol lines being used
> on particular transfers.
> 
> patch 1: Transfer the opcode alone

Has this been tested on more than one SPI controller? Is this safe to do?

> 
> patch 2: Add SPI I/O protocol lines via spi->proto 
> 
> patch 3: Use spi->proto on SiFive SPI controller
> 
> Any inputs?

Why cannot SiFive SPI controller implement spi_mem_ops? Is there a non
flash SPI device that supports quad mode?

> Jagan.
> 
> Jagan Teki (3):
>   spi: spi-mem: Xfer opcode alone for non spi-mem
>   spi: Support SPI I/O protocol lines
>   spi: sifive: Fix format register proto field
> 
>  drivers/spi/spi-mem.c    | 68 +++++++++++++++++++++++++---------------
>  drivers/spi/spi-sifive.c | 11 +++++--
>  drivers/spi/spi-uclass.c |  7 +++++
>  include/spi.h            |  9 ++++++
>  4 files changed, 67 insertions(+), 28 deletions(-)
>