rk3399 single channel lpddr4 setup

[Jack Mitchell]

Has anyone worked with an rk3399 based board with a single channel RAM
setup? I've looked at the current code and made some changes for only
setting up a single channel which basically consists of altering the
loops down to one channel, however u-boot is hanging while checking for
a successful frequency change here:

>        /* change freq */
>        writel((((0x3 << 4) | (1 << 2) | 1) << 16) |
>               (fn << 4) | (1 << 2) | 1, &dram->cic->cic_ctrl0);
>        while (!(readl(&dram->cic->cic_status0) & (1 << 2)))
>                ;
>

I believe this is due to waiting for both channels to switch frequency
which will never happen as there is only a single channel setup.

Has anyone worked with a similar setup, or have any further
documentation as the TRM only has a fairly basic register listing.

Regards,
Jack.