[RFC PATCH 7/9] pci: Add some PCI Express capability register offset definitions
Sylwester Nawrocki
s.nawrocki at samsung.com
Tue Apr 21 18:50:57 CEST 2020
Add PCI Express capability definitions required by the Broadcom STB PCIe
driver.
Signed-off-by: Sylwester Nawrocki <s.nawrocki at samsung.com>
---
include/pci.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/include/pci.h b/include/pci.h
index 3d7646d..2b25a17 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -481,10 +481,17 @@
#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */
#define PCI_EXP_LNKCAP 12 /* Link Capabilities */
+#define PCI_EXP_LNKCAP_SLS 0x0000000f /* Supported Link Speeds */
+#define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */
#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */
#define PCI_EXP_LNKSTA 18 /* Link Status */
+#define PCI_EXP_LNKSTA_CLS 0x000f /* Current Link Speed */
+#define PCI_EXP_LNKSTA_NLW 0x03f0 /* Negotiated Link Width */
+#define PCI_EXP_LNKSTA_NLW_SHIFT 4 /* start of NLW mask in link status */
+
#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */
+#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */
#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */
#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */
--
2.7.4
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