bug: lib: Improve _parse_integer_fixup_radix base 16 detection breaks mtdparts output
Michal Simek
michal.simek at xilinx.com
Wed Apr 22 11:24:52 CEST 2020
On 22. 04. 20 11:23, Heiko Schocher wrote:
> Hello Michal,
>
> Am 22.04.2020 um 11:13 schrieb Michal Simek:
>> On 22. 04. 20 11:11, Heiko Schocher wrote:
>>> Hello Michal,
>>>
>>> I see the following reggression on an imx6ull based board with current
>>> mainline:
>>>
>>> With U-Boot 2020.04 I see:
>>>
>>> U-Boot 2020.04 (Apr 22 2020 - 07:39:27 +0000)
>>> [...]
>>> => sf probe
>>> SF: Detected s25fl128l with page size 256 Bytes, erase size 4 KiB, total
>>> 16 MiB
>>> => mtdparts
>>>
>>> device nand0 <gpmi-nand>, # parts = 1
>>> #: name size offset mask_flags
>>> 0: ubi 0x10000000 0x00000000 0
>>>
>>> device nor0 <spi1.0>, # parts = 6
>>> #: name size offset mask_flags
>>> 0: spl 0x00010000 0x00000000 0
>>> 1: u-boot 0x000c0000 0x00010000 0
>>> 2: env 0x00010000 0x000d0000 0
>>> 3: env-red 0x00010000 0x000e0000 0
>>> 4: key 0x00010000 0x000f0000 0
>>> 5: rescue 0x00f00000 0x00100000 0
>>>
>>> active partition: nand0,0 - (ubi) 0x10000000 @ 0x00000000
>>>
>>> defaults:
>>> mtdids : nand0=gpmi-nand,nor0=spi1.0
>>> mtdparts:
>>> mtdparts=gpmi-nand:-(ubi);spi1.0:64k(spl),768k(u-boot),64k(env),64k(env-red),64k(key),-(rescue)
>>>
>>>
>>> =>
>>>
>>> With current mainline U-Boot:
>>>
>>> U-Boot 2020.04-00531-gbdcb29960e-dirty (Apr 22 2020 - 05:28:42 +0000)
>>> [...]
>>> => sf probe
>>> SF: Detected s25fl128l with page size 256 Bytes, erase size 4 KiB, total
>>> 16 MiB
>>> => mtdparts
>>>
>>> device nand0 <gpmi-nand>, # parts = 1
>>> #: name size offset mask_flags
>>> 0: ubi 0x10000000 0x00000000 0
>>>
>>> device nor0 <spi1.0>, # parts = 6
>>> #: name size offset mask_flags
>>> 0: spl 0x00019000 0x00000000 0
>>> 1: u-boot 0x001da000 0x00019000 0
>>> 2: env 0x00019000 0x001f3000 0
>>> 3: env-red 0x00019000 0x0020c000 0
>>> 4: key 0x00019000 0x00225000 0
>>> 5: rescue 0x00dc2000 0x0023e000 0
>>>
>>> active partition: nand0,0 - (ubi) 0x10000000 @ 0x00000000
>>>
>>> defaults:
>>> mtdids : nand0=gpmi-nand,nor0=spi1.0
>>> mtdparts:
>>> mtdparts=gpmi-nand:-(ubi);spi1.0:64k(spl),768k(u-boot),64k(env),64k(env-red),64k(key),-(rescue)
>>>
>>>
>>> =>
>>>
>>> So the offset/sizes are ... suboptimal ...
>>>
>>> git bisect drops:
>>>
>>> $ git bisect visualize
>>> commit 0486497e2b5f4d36fa968a1a60fea358cbf70b65 (refs/bisect/bad)
>>> Author: Michal Simek <michal.simek at xilinx.com>
>>> Date: Fri Feb 7 13:04:10 2020 +0100
>>>
>>> lib: Improve _parse_integer_fixup_radix base 16 detection
>>>
>>> Base autodetection is failing for this case:
>>> if test 257 -gt 3ae; then echo first; else echo second; fi
>>>
>>> It is because base for 3ae is recognized by
>>> _parse_integer_fixup_radix() as
>>> 10. The code detects the first char which is not between 'a'/'A' or
>>> 'f'/'F'
>>> to change base from dec to hex.
>>>
>>> Signed-off-by: Michal Simek <michal.simek at xilinx.com>
>>> Signed-off-by: Shiril Tichkule <shirilt at xlinx.com>
>>> $ git bisect log
>>> git bisect start
>>> # good: [36fec02b1f90b92cf51ec531564f9284eae27ab4] Prepare v2020.04
>>> git bisect good 36fec02b1f90b92cf51ec531564f9284eae27ab4
>>> # bad: [2af31afc7ac55b2d11676da51599c6dd679e77c3] Merge branch 'master'
>>> of git://git.denx.de/u-boot-socfpga
>>> git bisect bad 2af31afc7ac55b2d11676da51599c6dd679e77c3
>>> # good: [e9a20f8a198c11a4108ca4b4deef8398f0cd93aa] ram: stm32mp1:
>>> increase vdd2_ddr: buck2 for 32bits LPDDR
>>> git bisect good e9a20f8a198c11a4108ca4b4deef8398f0cd93aa
>>> # bad: [1f47e2aca42c2e51ff3a7754c717ee13f568c721] Merge tag
>>> 'xilinx-for-v2020.07' of
>>> https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
>>> git bisect bad 1f47e2aca42c2e51ff3a7754c717ee13f568c721
>>> # good: [25de8a8d0fd41059a884cb6f5b5032e01bdf8be2] net: zynq-gem: Setup
>>> and use mdio base separately
>>> git bisect good 25de8a8d0fd41059a884cb6f5b5032e01bdf8be2
>>> # bad: [895a7866c20cf6c01779b5a60fbf2770b88930a4] serial: zynq: Change
>>> uart initialization logic
>>> git bisect bad 895a7866c20cf6c01779b5a60fbf2770b88930a4
>>> # bad: [0486497e2b5f4d36fa968a1a60fea358cbf70b65] lib: Improve
>>> _parse_integer_fixup_radix base 16 detection
>>> git bisect bad 0486497e2b5f4d36fa968a1a60fea358cbf70b65
>>> # good: [001ad66324ba2613e04df5cc6ad8285622fd866b] ARM: zynq: Enable i2c
>>> mux support for all boards
>>> git bisect good 001ad66324ba2613e04df5cc6ad8285622fd866b
>>> # good: [387121c173da6998465b80876dae4c1cf38cdce1] arm64: zynqmp Add
>>> support for zcu111 revA
>>> git bisect good 387121c173da6998465b80876dae4c1cf38cdce1
>>> # good: [352f86bf8658ec32d9e64f2d1b9134be6f8555e5] arm64: zynqmp: Enable
>>> netconsole for ZynqMP
>>> git bisect good 352f86bf8658ec32d9e64f2d1b9134be6f8555e5
>>> # first bad commit: [0486497e2b5f4d36fa968a1a60fea358cbf70b65] lib:
>>> Improve _parse_integer_fixup_radix base 16 detection
>>>
>>> Any idea?
>>
>> Have sent a patch for it.
>> https://lists.denx.de/pipermail/u-boot/2020-April/405925.html
>
> Ah, thanks!
>
>> Please try.
>
> Works! I send my tested-by to the patch.
I will send pull request to Tom also with other Xilinx changes soon.
Thanks,
Michal
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