[PATCH 6/9] pci_ep: layerscape: Add Support for ls2085a and ls2080a EP mode

[Z.q. Hou]

> -----Original Message-----
> From: Xiaowei Bao <xiaowei.bao at nxp.com>
> Sent: 2020年3月22日 19:13
> To: M.h. Lian <minghuan.lian at nxp.com>; Z.q. Hou
> <zhiqiang.hou at nxp.com>; Mingkai Hu <mingkai.hu at nxp.com>;
> bmeng.cn at gmail.com; yamada.masahiro at socionext.com;
> u-boot at lists.denx.de
> Cc: Xiaowei Bao <xiaowei.bao at nxp.com>
> Subject: [PATCH 6/9] pci_ep: layerscape: Add Support for ls2085a and
> ls2080a EP mode
> 
> Due to the ls2085a and ls2080a use difference way to set the BAR size, so
> add the BAR size init code here.
> 
> Signed-off-by: Xiaowei Bao <xiaowei.bao at nxp.com>
> ---
>  drivers/pci/pcie_layerscape_ep.c | 18 +++++++++++++-----
>  1 file changed, 13 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/pci/pcie_layerscape_ep.c
> b/drivers/pci/pcie_layerscape_ep.c
> index a2b18ad..cd7ea26 100644
> --- a/drivers/pci/pcie_layerscape_ep.c
> +++ b/drivers/pci/pcie_layerscape_ep.c
> @@ -172,17 +172,25 @@ static void ls_pcie_setup_ep(struct ls_pcie_ep
> *pcie_ep)
>  			 */
>  			writel(0, pcie->dbi + PCIE_MISC_CONTROL_1_OFF);
> 
> +			bar_base = pcie->dbi +
> +				   PCIE_MASK_OFFSET(pcie_ep->cfg2_flag, pf);
> +
>  			if (pcie_ep->cfg2_flag) {
> -				for (vf = 0; vf <= PCIE_VF_NUM; vf++) {
> +				ctrl_writel(pcie,
> +					    PCIE_LCTRL0_VAL(pf, 0),
> +					    PCIE_PF_VF_CTRL);
> +				ls_pcie_ep_setup_bars(bar_base);
> +
> +				for (vf = 1; vf <= PCIE_VF_NUM; vf++) {
>  					ctrl_writel(pcie,
>  						    PCIE_LCTRL0_VAL(pf, vf),
>  						    PCIE_PF_VF_CTRL);
> +					ls_pcie_ep_setup_vf_bars(bar_base);
>  				}
> +			} else {
> +				ls_pcie_ep_setup_bars(bar_base);
> +				ls_pcie_ep_setup_vf_bars(bar_base);
>  			}
> -			bar_base = pcie->dbi +
> -				   PCIE_MASK_OFFSET(pcie_ep->cfg2_flag, pf);
> -			ls_pcie_ep_setup_bars(bar_base);
> -			ls_pcie_ep_setup_vf_bars(bar_base);
> 
>  			ls_pcie_ep_setup_atu(pcie_ep, pf);
>  		}
> --
> 2.9.5
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>