[PATCH 7/8] net: dwc_eth_qos: Export common struct and interface at head file

[David Wu]

Open structure data and interface, so that Soc using dw_eth_qos
controller can reference.

Signed-off-by: David Wu <david.wu at rock-chips.com>
---

 drivers/net/dwc_eth_qos.c | 81 +++++----------------------------------
 1 file changed, 9 insertions(+), 72 deletions(-)

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 25b3449047..7f47e5f505 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -41,6 +41,7 @@
 #include <wait_bit.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
+#include "dwc_eth_qos.h"
 
 /* Core registers */
 
@@ -94,9 +95,6 @@ struct eqos_mac_regs {
 
 #define EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT			0
 #define EQOS_MAC_RXQ_CTRL0_RXQ0EN_MASK			3
-#define EQOS_MAC_RXQ_CTRL0_RXQ0EN_NOT_ENABLED		0
-#define EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB		2
-#define EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV		1
 
 #define EQOS_MAC_RXQ_CTRL2_PSRQ0_SHIFT			0
 #define EQOS_MAC_RXQ_CTRL2_PSRQ0_MASK			0xff
@@ -109,8 +107,6 @@ struct eqos_mac_regs {
 #define EQOS_MAC_MDIO_ADDRESS_PA_SHIFT			21
 #define EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT			16
 #define EQOS_MAC_MDIO_ADDRESS_CR_SHIFT			8
-#define EQOS_MAC_MDIO_ADDRESS_CR_20_35			2
-#define EQOS_MAC_MDIO_ADDRESS_CR_250_300		5
 #define EQOS_MAC_MDIO_ADDRESS_SKAP			BIT(4)
 #define EQOS_MAC_MDIO_ADDRESS_GOC_SHIFT			2
 #define EQOS_MAC_MDIO_ADDRESS_GOC_READ			3
@@ -261,65 +257,6 @@ struct eqos_desc {
 #define EQOS_DESC3_LD		BIT(28)
 #define EQOS_DESC3_BUF1V	BIT(24)
 
-struct eqos_config {
-	bool reg_access_always_ok;
-	int mdio_wait;
-	int swr_wait;
-	int config_mac;
-	int config_mac_mdio;
-	struct eqos_ops *ops;
-};
-
-struct eqos_ops {
-	void (*eqos_inval_desc)(void *desc);
-	void (*eqos_flush_desc)(void *desc);
-	void (*eqos_inval_buffer)(void *buf, size_t size);
-	void (*eqos_flush_buffer)(void *buf, size_t size);
-	int (*eqos_probe_resources)(struct udevice *dev);
-	int (*eqos_remove_resources)(struct udevice *dev);
-	int (*eqos_stop_resets)(struct udevice *dev);
-	int (*eqos_start_resets)(struct udevice *dev);
-	void (*eqos_stop_clks)(struct udevice *dev);
-	int (*eqos_start_clks)(struct udevice *dev);
-	int (*eqos_calibrate_pads)(struct udevice *dev);
-	int (*eqos_disable_calibration)(struct udevice *dev);
-	int (*eqos_set_tx_clk_speed)(struct udevice *dev);
-	ulong (*eqos_get_tick_clk_rate)(struct udevice *dev);
-	phy_interface_t (*eqos_get_interface)(struct udevice *dev);
-};
-
-struct eqos_priv {
-	struct udevice *dev;
-	const struct eqos_config *config;
-	fdt_addr_t regs;
-	struct eqos_mac_regs *mac_regs;
-	struct eqos_mtl_regs *mtl_regs;
-	struct eqos_dma_regs *dma_regs;
-	struct eqos_tegra186_regs *tegra186_regs;
-	struct reset_ctl reset_ctl;
-	struct gpio_desc phy_reset_gpio;
-	u32 reset_delays[3];
-	struct clk clk_master_bus;
-	struct clk clk_rx;
-	struct clk clk_ptp_ref;
-	struct clk clk_tx;
-	struct clk clk_ck;
-	struct clk clk_slave_bus;
-	struct mii_dev *mii;
-	struct phy_device *phy;
-	int phyaddr;
-	u32 max_speed;
-	void *descs;
-	struct eqos_desc *tx_descs;
-	struct eqos_desc *rx_descs;
-	int tx_desc_idx, rx_desc_idx;
-	void *tx_dma_buf;
-	void *rx_dma_buf;
-	void *rx_pkt;
-	bool started;
-	bool reg_access_ok;
-};
-
 /*
  * TX and RX descriptors are 16 bytes. This causes problems with the cache
  * maintenance on CPUs where the cache-line size exceeds the size of these
@@ -1007,7 +944,7 @@ static int eqos_adjust_link(struct udevice *dev)
 	return 0;
 }
 
-static int eqos_write_hwaddr(struct udevice *dev)
+int eqos_write_hwaddr(struct udevice *dev)
 {
 	struct eth_pdata *plat = dev_get_platdata(dev);
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -1051,7 +988,7 @@ static int eqos_write_hwaddr(struct udevice *dev)
 	return 0;
 }
 
-static int eqos_init(struct udevice *dev)
+int eqos_init(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	int ret, limit;
@@ -1161,7 +1098,7 @@ err:
 	return ret;
 }
 
-static void eqos_enable(struct udevice *dev)
+void eqos_enable(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	u32 val, tx_fifo_sz, rx_fifo_sz, tqs, rqs, pbl;
@@ -1387,7 +1324,7 @@ static int eqos_start(struct udevice *dev)
 	return 0;
 }
 
-static void eqos_stop(struct udevice *dev)
+void eqos_stop(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	int i;
@@ -1441,7 +1378,7 @@ static void eqos_stop(struct udevice *dev)
 	debug("%s: OK\n", __func__);
 }
 
-static int eqos_send(struct udevice *dev, void *packet, int length)
+int eqos_send(struct udevice *dev, void *packet, int length)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	struct eqos_desc *tx_desc;
@@ -1482,7 +1419,7 @@ static int eqos_send(struct udevice *dev, void *packet, int length)
 	return -ETIMEDOUT;
 }
 
-static int eqos_recv(struct udevice *dev, int flags, uchar **packetp)
+int eqos_recv(struct udevice *dev, int flags, uchar **packetp)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	struct eqos_desc *rx_desc;
@@ -1506,7 +1443,7 @@ static int eqos_recv(struct udevice *dev, int flags, uchar **packetp)
 	return length;
 }
 
-static int eqos_free_pkt(struct udevice *dev, uchar *packet, int length)
+int eqos_free_pkt(struct udevice *dev, uchar *packet, int length)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	uchar *packet_expected;
@@ -1833,7 +1770,7 @@ static int eqos_remove_resources_stm32(struct udevice *dev)
 	return 0;
 }
 
-static int eqos_probe(struct udevice *dev)
+int eqos_probe(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	int ret;
-- 
2.19.1