[PATCH 2/3] arm: dts: imx8mm: sync dts from Linux Kernel 5.10-rc6

Peng Fan peng.fan at nxp.com
Mon Dec 7 03:11:32 CET 2020


> Subject: [PATCH 2/3] arm: dts: imx8mm: sync dts from Linux Kernel 5.10-rc6
> 
> There have been some updates to the device tree since 5.6.
> This also includes some clocks, and makes it easier to keep board device tree
> files in sync with Linux
> 
> Signed-off-by: Adam Ford <aford173 at gmail.com>


Acked-by: Peng Fan <peng.fan at nxp.com>

> 
> diff --git a/arch/arm/dts/imx8mm.dtsi b/arch/arm/dts/imx8mm.dtsi index
> 1e5e11592f..05ee062548 100644
> --- a/arch/arm/dts/imx8mm.dtsi
> +++ b/arch/arm/dts/imx8mm.dtsi
> @@ -18,10 +18,18 @@
> 
>  	aliases {
>  		ethernet0 = &fec1;
> +		gpio0 = &gpio1;
> +		gpio1 = &gpio2;
> +		gpio2 = &gpio3;
> +		gpio3 = &gpio4;
> +		gpio4 = &gpio5;
>  		i2c0 = &i2c1;
>  		i2c1 = &i2c2;
>  		i2c2 = &i2c3;
>  		i2c3 = &i2c4;
> +		mmc0 = &usdhc1;
> +		mmc1 = &usdhc2;
> +		mmc2 = &usdhc3;
>  		serial0 = &uart1;
>  		serial1 = &uart2;
>  		serial2 = &uart3;
> @@ -29,14 +37,6 @@
>  		spi0 = &ecspi1;
>  		spi1 = &ecspi2;
>  		spi2 = &ecspi3;
> -		mmc0 = &usdhc1;
> -		mmc1 = &usdhc2;
> -		mmc2 = &usdhc3;
> -		gpio0 = &gpio1;
> -		gpio1 = &gpio2;
> -		gpio2 = &gpio3;
> -		gpio3 = &gpio4;
> -		gpio4 = &gpio5;
>  	};
> 
>  	cpus {
> @@ -68,6 +68,7 @@
>  			nvmem-cells = <&cpu_speed_grade>;
>  			nvmem-cell-names = "speed_grade";
>  			cpu-idle-states = <&cpu_pd_wait>;
> +			#cooling-cells = <2>;
>  		};
> 
>  		A53_1: cpu at 1 {
> @@ -80,6 +81,7 @@
>  			next-level-cache = <&A53_L2>;
>  			operating-points-v2 = <&a53_opp_table>;
>  			cpu-idle-states = <&cpu_pd_wait>;
> +			#cooling-cells = <2>;
>  		};
> 
>  		A53_2: cpu at 2 {
> @@ -92,6 +94,7 @@
>  			next-level-cache = <&A53_L2>;
>  			operating-points-v2 = <&a53_opp_table>;
>  			cpu-idle-states = <&cpu_pd_wait>;
> +			#cooling-cells = <2>;
>  		};
> 
>  		A53_3: cpu at 3 {
> @@ -104,6 +107,7 @@
>  			next-level-cache = <&A53_L2>;
>  			operating-points-v2 = <&a53_opp_table>;
>  			cpu-idle-states = <&cpu_pd_wait>;
> +			#cooling-cells = <2>;
>  		};
> 
>  		A53_L2: l2-cache0 {
> @@ -125,7 +129,7 @@
> 
>  		opp-1600000000 {
>  			opp-hz = /bits/ 64 <1600000000>;
> -			opp-microvolt = <900000>;
> +			opp-microvolt = <950000>;
>  			opp-supported-hw = <0xc>, <0x7>;
>  			clock-latency-ns = <150000>;
>  			opp-suspend;
> @@ -204,6 +208,38 @@
>  		arm,no-tick-in-suspend;
>  	};
> 
> +	thermal-zones {
> +		cpu-thermal {
> +			polling-delay-passive = <250>;
> +			polling-delay = <2000>;
> +			thermal-sensors = <&tmu>;
> +			trips {
> +				cpu_alert0: trip0 {
> +					temperature = <85000>;
> +					hysteresis = <2000>;
> +					type = "passive";
> +				};
> +
> +				cpu_crit0: trip1 {
> +					temperature = <95000>;
> +					hysteresis = <2000>;
> +					type = "critical";
> +				};
> +			};
> +
> +			cooling-maps {
> +				map0 {
> +					trip = <&cpu_alert0>;
> +					cooling-device =
> +						<&A53_0 THERMAL_NO_LIMIT
> THERMAL_NO_LIMIT>,
> +						<&A53_1 THERMAL_NO_LIMIT
> THERMAL_NO_LIMIT>,
> +						<&A53_2 THERMAL_NO_LIMIT
> THERMAL_NO_LIMIT>,
> +						<&A53_3 THERMAL_NO_LIMIT
> THERMAL_NO_LIMIT>;
> +				};
> +			};
> +		};
> +	};
> +
>  	usbphynop1: usbphynop1 {
>  		compatible = "usb-nop-xceiv";
>  		clocks = <&clk IMX8MM_CLK_USB_PHY_REF>; @@ -227,12
> +263,14 @@
>  		ranges = <0x0 0x0 0x0 0x3e000000>;
> 
>  		aips1: bus at 30000000 {
> -			compatible = "simple-bus";
> +			compatible = "fsl,aips-bus", "simple-bus";
> +			reg = <0x30000000 0x400000>;
>  			#address-cells = <1>;
>  			#size-cells = <1>;
>  			ranges = <0x30000000 0x30000000 0x400000>;
> 
>  			sai1: sai at 30010000 {
> +				#sound-dai-cells = <0>;
>  				compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
>  				reg = <0x30010000 0x10000>;
>  				interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; @@
> -246,6 +284,7 @@
>  			};
> 
>  			sai2: sai at 30020000 {
> +				#sound-dai-cells = <0>;
>  				compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
>  				reg = <0x30020000 0x10000>;
>  				interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; @@
> -273,6 +312,7 @@
>  			};
> 
>  			sai5: sai at 30050000 {
> +				#sound-dai-cells = <0>;
>  				compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
>  				reg = <0x30050000 0x10000>;
>  				interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; @@
> -286,6 +326,7 @@
>  			};
> 
>  			sai6: sai at 30060000 {
> +				#sound-dai-cells = <0>;
>  				compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
>  				reg = <0x30060000 0x10000>;
>  				interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; @@
> -363,6 +404,13 @@
>  				gpio-ranges = <&iomuxc 0 119 30>;
>  			};
> 
> +			tmu: tmu at 30260000 {
> +				compatible = "fsl,imx8mm-tmu";
> +				reg = <0x30260000 0x10000>;
> +				clocks = <&clk IMX8MM_CLK_TMU_ROOT>;
> +				#thermal-sensor-cells = <0>;
> +			};
> +
>  			wdog1: watchdog at 30280000 {
>  				compatible = "fsl,imx8mm-wdt", "fsl,imx21-wdt";
>  				reg = <0x30280000 0x10000>;
> @@ -419,7 +467,7 @@
>  				reg = <0x30340000 0x10000>;
>  			};
> 
> -			ocotp: ocotp-ctrl at 30350000 {
> +			ocotp: efuse at 30350000 {
>  				compatible = "fsl,imx8mm-ocotp", "syscon";
>  				reg = <0x30350000 0x10000>;
>  				clocks = <&clk IMX8MM_CLK_OCOTP_ROOT>; @@ -455,6
> +503,8 @@
>  					compatible = "fsl,sec-v4.0-pwrkey";
>  					regmap = <&snvs>;
>  					interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> +					clocks = <&clk IMX8MM_CLK_SNVS_ROOT>;
> +					clock-names = "snvs-pwrkey";
>  					linux,keycode = <KEY_POWER>;
>  					wakeup-source;
>  					status = "disabled";
> @@ -469,16 +519,20 @@
>  					 <&clk_ext3>, <&clk_ext4>;
>  				clock-names = "osc_32k", "osc_24m", "clk_ext1",
> "clk_ext2",
>  					      "clk_ext3", "clk_ext4";
> -				assigned-clocks = <&clk IMX8MM_CLK_NOC>,
> +				assigned-clocks = <&clk IMX8MM_CLK_A53_SRC>,
> +						<&clk IMX8MM_CLK_A53_CORE>,
> +						<&clk IMX8MM_CLK_NOC>,
>  						<&clk IMX8MM_CLK_AUDIO_AHB>,
>  						<&clk IMX8MM_CLK_IPG_AUDIO_ROOT>,
>  						<&clk IMX8MM_SYS_PLL3>,
>  						<&clk IMX8MM_VIDEO_PLL1>,
>  						<&clk IMX8MM_AUDIO_PLL1>,
>  						<&clk IMX8MM_AUDIO_PLL2>;
> -				assigned-clock-parents = <&clk
> IMX8MM_SYS_PLL3_OUT>,
> +				assigned-clock-parents = <&clk
> IMX8MM_SYS_PLL1_800M>,
> +							 <&clk IMX8MM_ARM_PLL_OUT>,
> +							 <&clk IMX8MM_SYS_PLL3_OUT>,
>  							 <&clk IMX8MM_SYS_PLL1_800M>;
> -				assigned-clock-rates = <0>,
> +				assigned-clock-rates = <0>, <0>, <0>,
>  							<400000000>,
>  							<400000000>,
>  							<750000000>,
> @@ -496,7 +550,8 @@
>  		};
> 
>  		aips2: bus at 30400000 {
> -			compatible = "simple-bus";
> +			compatible = "fsl,aips-bus", "simple-bus";
> +			reg = <0x30400000 0x400000>;
>  			#address-cells = <1>;
>  			#size-cells = <1>;
>  			ranges = <0x30400000 0x30400000 0x400000>; @@ -555,10
> +610,12 @@
>  		};
> 
>  		aips3: bus at 30800000 {
> -			compatible = "simple-bus";
> +			compatible = "fsl,aips-bus", "simple-bus";
> +			reg = <0x30800000 0x400000>;
>  			#address-cells = <1>;
>  			#size-cells = <1>;
> -			ranges = <0x30800000 0x30800000 0x400000>;
> +			ranges = <0x30800000 0x30800000 0x400000>,
> +				 <0x8000000 0x8000000 0x10000000>;
> 
>  			ecspi1: spi at 30820000 {
>  				compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi"; @@
> -718,6 +775,14 @@
>  				status = "disabled";
>  			};
> 
> +			mu: mailbox at 30aa0000 {
> +				compatible = "fsl,imx8mm-mu", "fsl,imx6sx-mu";
> +				reg = <0x30aa0000 0x10000>;
> +				interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clk IMX8MM_CLK_MU_ROOT>;
> +				#mbox-cells = <2>;
> +			};
> +
>  			usdhc1: mmc at 30b40000 {
>  				compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
>  				reg = <0x30b40000 0x10000>;
> @@ -760,6 +825,19 @@
>  				status = "disabled";
>  			};
> 
> +			flexspi: spi at 30bb0000 {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				compatible = "nxp,imx8mm-fspi";
> +				reg = <0x30bb0000 0x10000>, <0x8000000 0x10000000>;
> +				reg-names = "fspi_base", "fspi_mmap";
> +				interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clk IMX8MM_CLK_QSPI_ROOT>,
> +					 <&clk IMX8MM_CLK_QSPI_ROOT>;
> +				clock-names = "fspi", "fspi_en";
> +				status = "disabled";
> +			};
> +
>  			sdma1: dma-controller at 30bd0000 {
>  				compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma";
>  				reg = <0x30bd0000 0x10000>;
> @@ -776,7 +854,8 @@
>  				reg = <0x30be0000 0x10000>;
>  				interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
>  					     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
> -					     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
> +					     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> +					     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&clk IMX8MM_CLK_ENET1_ROOT>,
>  					 <&clk IMX8MM_CLK_ENET1_ROOT>,
>  					 <&clk IMX8MM_CLK_ENET_TIMER>,
> @@ -800,7 +879,8 @@
>  		};
> 
>  		aips4: bus at 32c00000 {
> -			compatible = "simple-bus";
> +			compatible = "fsl,aips-bus", "simple-bus";
> +			reg = <0x32c00000 0x400000>;
>  			#address-cells = <1>;
>  			#size-cells = <1>;
>  			ranges = <0x32c00000 0x32c00000 0x400000>; @@ -896,7
> +976,6 @@
>  		ddr-pmu at 3d800000 {
>  			compatible = "fsl,imx8mm-ddr-pmu", "fsl,imx8m-ddr-pmu";
>  			reg = <0x3d800000 0x400000>;
> -			interrupt-parent = <&gic>;
>  			interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
>  		};
>  	};
> --
> 2.25.1



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