[PATCH 1/2] mtd: rawnand: cortina_nand: Add Cortina CAxxxx SoC support

[Tom Rini]

On Tue, Dec 08, 2020 at 11:37:36AM -0800, Alex Nemirovsky wrote:

> From: Kate Liu <kate.liu at cortina-access.com>
> 
> Add Cortina Access parallel Nand support for CAxxxx SOCs
> 
> Signed-off-by: Kate Liu <kate.liu at cortina-access.com>
> Signed-off-by: Alex Nemirovsky <alex.nemirovsky at cortina-access.com>
> CC: Tom Rini <trini at konsulko.com>
> CC: Scott Wood <oss at buserror.net>

A one small things:

[snip]
> +struct nand_ctlr {
> +	/* Cortina NAND controller register */
> +	u32 flash_id;		     // offset 0x000
> +	u32 flash_timeout;		// offset 0x004
> +	u32 flash_status;		 // offset 0x008
> +	u32 flash_type;		   // offset 0x00c
> +	u32 flash_flash_access_start;     // offset 0x010
> +	u32 flash_flash_interrupt;	// offset 0x014
> +	u32 flash_flash_mask;	     // offset 0x018
> +	u32 flash_fifo_control;	   // offset 0x01c
> +	u32 flash_fifo_status;	    // offset 0x020
> +	u32 flash_fifo_address;	   // offset 0x024
> +	u32 flash_fifo_match_address;     // offset 0x028
> +	u32 flash_fifo_data;	      // offset 0x02c
> +	u32 flash_sf_access;	      // offset 0x030
> +	u32 flash_sf_ext_access;	  // offset 0x034
> +	u32 flash_sf_address;	     // offset 0x038
> +	u32 flash_sf_data;		// offset 0x03c
> +	u32 flash_sf_timing;	      // offset 0x040
> +	u32 resv[3];
> +	u32 flash_pf_access;	      // offset 0x050

We don't need the offset commented on every member.  Typically it's not
done (which is annoying in debug / verification), but it is nice to see
after a reserved block.  Can you remove most of them so it's just
showing the post-resv offsets?  Thanks.

-- 
Tom
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